Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM)
Due to the difficulties associated with scaling of silicon transistors, various technologies beyond binary logic processing are actively being investigated. Ternary logic circuit implementation with carbon nanotube field effect transistors (CNTFETs) and resistive random access memory (RRAM) integrat...
| 發表在: | Micromachines |
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| Main Authors: | , , , , |
| 格式: | Article |
| 語言: | 英语 |
| 出版: |
MDPI AG
2021-10-01
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| 主題: | |
| 在線閱讀: | https://www.mdpi.com/2072-666X/12/11/1288 |
| _version_ | 1850340277815869440 |
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| author | Furqan Zahoor Fawnizu Azmadi Hussin Farooq Ahmad Khanday Mohamad Radzi Ahmad Illani Mohd Nawi |
| author_facet | Furqan Zahoor Fawnizu Azmadi Hussin Farooq Ahmad Khanday Mohamad Radzi Ahmad Illani Mohd Nawi |
| author_sort | Furqan Zahoor |
| collection | DOAJ |
| container_title | Micromachines |
| description | Due to the difficulties associated with scaling of silicon transistors, various technologies beyond binary logic processing are actively being investigated. Ternary logic circuit implementation with carbon nanotube field effect transistors (CNTFETs) and resistive random access memory (RRAM) integration is considered as a possible technology option. CNTFETs are currently being preferred for implementing ternary circuits due to their desirable multiple threshold voltage and geometry-dependent properties, whereas the RRAM is used due to its multilevel cell capability which enables storage of multiple resistance states within a single cell. This article presents the 2-trit arithmetic logic unit (ALU) design using CNTFETs and RRAM as the design elements. The proposed ALU incorporates a transmission gate block, a function select block, and various ternary function processing modules. The ALU design optimization is achieved by introducing a controlled ternary adder–subtractor module instead of separate adder and subtractor circuits. The simulations are analyzed and validated using Synopsis HSPICE simulation software with standard 32 nm CNTFET technology under different operating conditions (supply voltages) to test the robustness of the designs. The simulation results indicate that the proposed CNTFET-RRAM integration enables the compact circuit realization with good robustness. Moreover, due to the addition of RRAM as circuit element, the proposed ALU has the advantage of non-volatility. |
| format | Article |
| id | doaj-art-8b21c734b4ac446c8dd9d97c8cfae1e8 |
| institution | Directory of Open Access Journals |
| issn | 2072-666X |
| language | English |
| publishDate | 2021-10-01 |
| publisher | MDPI AG |
| record_format | Article |
| spelling | doaj-art-8b21c734b4ac446c8dd9d97c8cfae1e82025-08-19T23:14:37ZengMDPI AGMicromachines2072-666X2021-10-011211128810.3390/mi12111288Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM)Furqan Zahoor0Fawnizu Azmadi Hussin1Farooq Ahmad Khanday2Mohamad Radzi Ahmad3Illani Mohd Nawi4Electrical and Electronic Engineering Department, Universiti Teknologi PETRONAS, Seri Iskandar 32610, MalaysiaElectrical and Electronic Engineering Department, Universiti Teknologi PETRONAS, Seri Iskandar 32610, MalaysiaPost Graduate Department of Electronics and Instrumentation Technology, University of Kashmir, Srinagar 190006, IndiaElectrical and Electronic Engineering Department, Universiti Teknologi PETRONAS, Seri Iskandar 32610, MalaysiaElectrical and Electronic Engineering Department, Universiti Teknologi PETRONAS, Seri Iskandar 32610, MalaysiaDue to the difficulties associated with scaling of silicon transistors, various technologies beyond binary logic processing are actively being investigated. Ternary logic circuit implementation with carbon nanotube field effect transistors (CNTFETs) and resistive random access memory (RRAM) integration is considered as a possible technology option. CNTFETs are currently being preferred for implementing ternary circuits due to their desirable multiple threshold voltage and geometry-dependent properties, whereas the RRAM is used due to its multilevel cell capability which enables storage of multiple resistance states within a single cell. This article presents the 2-trit arithmetic logic unit (ALU) design using CNTFETs and RRAM as the design elements. The proposed ALU incorporates a transmission gate block, a function select block, and various ternary function processing modules. The ALU design optimization is achieved by introducing a controlled ternary adder–subtractor module instead of separate adder and subtractor circuits. The simulations are analyzed and validated using Synopsis HSPICE simulation software with standard 32 nm CNTFET technology under different operating conditions (supply voltages) to test the robustness of the designs. The simulation results indicate that the proposed CNTFET-RRAM integration enables the compact circuit realization with good robustness. Moreover, due to the addition of RRAM as circuit element, the proposed ALU has the advantage of non-volatility.https://www.mdpi.com/2072-666X/12/11/1288multiple valued logic (MVL)resistive random access memory (RRAM)carbon nanotube field effect transistor (CNTFET)ternary logic systemsemerging technologiesinnovation |
| spellingShingle | Furqan Zahoor Fawnizu Azmadi Hussin Farooq Ahmad Khanday Mohamad Radzi Ahmad Illani Mohd Nawi Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) multiple valued logic (MVL) resistive random access memory (RRAM) carbon nanotube field effect transistor (CNTFET) ternary logic systems emerging technologies innovation |
| title | Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) |
| title_full | Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) |
| title_fullStr | Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) |
| title_full_unstemmed | Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) |
| title_short | Ternary Arithmetic Logic Unit Design Utilizing Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) |
| title_sort | ternary arithmetic logic unit design utilizing carbon nanotube field effect transistor cntfet and resistive random access memory rram |
| topic | multiple valued logic (MVL) resistive random access memory (RRAM) carbon nanotube field effect transistor (CNTFET) ternary logic systems emerging technologies innovation |
| url | https://www.mdpi.com/2072-666X/12/11/1288 |
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