APA (7th ed.) Citation

Ma, K., Le, D., Pham, C., & Hoang, T. (2023, May). Design of an SoC Based on 32-Bit RISC-V Processor with Low-Latency Lightweight Cryptographic Cores in FPGA. Future Internet.

Chicago Style (17th ed.) Citation

Ma, Khai-Minh, Duc-Hung Le, Cong-Kha Pham, and Trong-Thuc Hoang. "Design of an SoC Based on 32-Bit RISC-V Processor with Low-Latency Lightweight Cryptographic Cores in FPGA." Future Internet May. 2023.

MLA (9th ed.) Citation

Ma, Khai-Minh, et al. "Design of an SoC Based on 32-Bit RISC-V Processor with Low-Latency Lightweight Cryptographic Cores in FPGA." Future Internet, May. 2023.