| 要約: | In channel coding, reducing power consumption and improving energy efficiency are major challenges in sliding window decoding (SWD) architectures for spatially coupled low-density parity-check (SC-LDPC) codes. In contrast to the well-elaborated literature on energy-efficient decoder implementations of classical LDPC block codes (LDPC-BCs), there is little research on the aforementioned challenges for SC-LDPC codes. Thus, in this paper, we investigate a novel approach for energy-efficient implementation of very high-throughput SWD for SC-LDPC codes. First, our approach proposes an analogy to state-ofthe- art iteration control techniques for LDPC-BC decoders, by dynamically adapting the window size for the decoding of SC-LDPC codes. For this purpose, we derive new algorithms that sequentially activate and/or deactivate the processors inside the window, without loss in error correction performance. Second, we propose an architecture for very high-throughput decoder implementations. Furthermore, to meet the high throughput requirements and improve energy efficiency, we revisit the window-size adaption criteria and slightly relax the derived algorithms in terms of error correction capability. Implementation results of the new revisited full-adaptive decoder in a 12 nm technology show that, at a negligible loss in error correction performance, the proposed adaptive SWD approach improves the energy efficiency by a factor of 1.4 to 3.4 compared to the state-of-the-art in the 4 dB to 7 dB signal-to-noise-ratio (SNR) range. This improvement is further increased up to a factor of 6.5 at higher SNRs.
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