Designing a Novel high-speed ternary-logic multiplier using GNRFET Technology

• Published in: Journal of Optoelectronical Nanostructures
• Main Authors: Zahra Rohani, Azadeh Alsadat Emrani Zarandi
• Format: Article
• Language: English
• Published: Islamic Azad University, Marvdasht Branch 2023-01-01
• Subjects: gnrfet; multiplier; mvl circuit; pdp; ternary logic
• Online Access: https://jopn.marvdasht.iau.ir/article_5800_0625b6798dc77919fd9edce5919f3dbc.pdf
• ISSN: 2423-7361; 2538-2489

Abstract:This paper presents a novel design of a ternary multiplierbased on graphene nanoribbon field-effect transistor(GNRFET). GNRFET, as a new material with superiorphysical and electronic properties, can be a good choiceinstead of conventional devices such as metal–oxide–semiconductor field-effect transistor (MOSFET) andCNTFET. Moreover, multiple-valued logic (MVL) canhelp to reduce area and decrease the computational stepcompared with binary logic. We proposed a ternarymultiplier with the resistors to produce ternary logic. Theproposed multiplier performances are analyzed byevaluating the delay, power, and power-delay product(PDP), with 15 nm process technologies based onGNRFET. The simulation results with HSPICEdemonstrate that the proposed design frameworkoutperforms state-of-the-art designs in circuit parameters.