APA (7th ed.) Citation

Tomar, G. S., George, M. L., & Tomar, A. S. (2021, August). Multi‐precision binary multiplier architecture for multi‐precision floating‐point multiplication. IET Circuits, Devices and Systems.

Chicago Style (17th ed.) Citation

Tomar, Geetam Singh, Marcus Llyode George, and Abhineet Singh Tomar. "Multi‐precision Binary Multiplier Architecture for Multi‐precision Floating‐point Multiplication." IET Circuits, Devices and Systems Aug. 2021.

MLA (9th ed.) Citation

Tomar, Geetam Singh, et al. "Multi‐precision Binary Multiplier Architecture for Multi‐precision Floating‐point Multiplication." IET Circuits, Devices and Systems, Aug. 2021.