Post-Moore Memory Technology: Sneak Path Current (SPC) Phenomena on RRAM Crossbar Array and Solutions
The sneak path current (SPC) is the inevitable issue in crossbar memory array while implementing high-density storage configuration. The crosstalks are attracting much attention, and the read accuracy in the crossbar architecture is deteriorated by the SPC. In this work, the sneak path current probl...
| الحاوية / القاعدة: | Micromachines |
|---|---|
| المؤلفون الرئيسيون: | , , |
| التنسيق: | مقال |
| اللغة: | الإنجليزية |
| منشور في: |
MDPI AG
2021-01-01
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| الموضوعات: | |
| الوصول للمادة أونلاين: | https://www.mdpi.com/2072-666X/12/1/50 |
| _version_ | 1850423540023558144 |
|---|---|
| author | Ying-Chen Chen Chao-Cheng Lin Yao-Feng Chang |
| author_facet | Ying-Chen Chen Chao-Cheng Lin Yao-Feng Chang |
| author_sort | Ying-Chen Chen |
| collection | DOAJ |
| container_title | Micromachines |
| description | The sneak path current (SPC) is the inevitable issue in crossbar memory array while implementing high-density storage configuration. The crosstalks are attracting much attention, and the read accuracy in the crossbar architecture is deteriorated by the SPC. In this work, the sneak path current problem is observed and investigated by the electrical experimental measurements in the crossbar array structure with the half-read scheme. The read margin of the selected cell is improved by the bilayer stacked structure, and the sneak path current is reduced ~20% in the bilayer structure. The voltage-read stress-induced read margin degradation has also been investigated, and less voltage stress degradation is showed in bilayer structure due to the intrinsic nonlinearity. The oxide-based bilayer stacked resistive random access memory (RRAM) is presented to offer immunity toward sneak path currents in high-density memory integrations when implementing the future high-density storage and in-memory computing applications. |
| format | Article |
| id | doaj-art-bbd0c1932f0d4a1c95b8d09e4ae5278b |
| institution | Directory of Open Access Journals |
| issn | 2072-666X |
| language | English |
| publishDate | 2021-01-01 |
| publisher | MDPI AG |
| record_format | Article |
| spelling | doaj-art-bbd0c1932f0d4a1c95b8d09e4ae5278b2025-08-19T22:41:35ZengMDPI AGMicromachines2072-666X2021-01-011215010.3390/mi12010050Post-Moore Memory Technology: Sneak Path Current (SPC) Phenomena on RRAM Crossbar Array and SolutionsYing-Chen Chen0Chao-Cheng Lin1Yao-Feng Chang2School of Informatics, Computing and Cyber Systems, Northern Arizona University, Flagstaff, AZ 86011, USATaiwan Semiconductor Research Institute, National Applied Research Laboratories, Hsinchu 30078, TaiwanDepartment of Electrical and Computing Engineering, The University of Texas at Austin, Austin, TX 78712, USAThe sneak path current (SPC) is the inevitable issue in crossbar memory array while implementing high-density storage configuration. The crosstalks are attracting much attention, and the read accuracy in the crossbar architecture is deteriorated by the SPC. In this work, the sneak path current problem is observed and investigated by the electrical experimental measurements in the crossbar array structure with the half-read scheme. The read margin of the selected cell is improved by the bilayer stacked structure, and the sneak path current is reduced ~20% in the bilayer structure. The voltage-read stress-induced read margin degradation has also been investigated, and less voltage stress degradation is showed in bilayer structure due to the intrinsic nonlinearity. The oxide-based bilayer stacked resistive random access memory (RRAM) is presented to offer immunity toward sneak path currents in high-density memory integrations when implementing the future high-density storage and in-memory computing applications.https://www.mdpi.com/2072-666X/12/1/50selectorlessresistive switchingsneak path currentvolatileresistive random access memory (RRAM) |
| spellingShingle | Ying-Chen Chen Chao-Cheng Lin Yao-Feng Chang Post-Moore Memory Technology: Sneak Path Current (SPC) Phenomena on RRAM Crossbar Array and Solutions selectorless resistive switching sneak path current volatile resistive random access memory (RRAM) |
| title | Post-Moore Memory Technology: Sneak Path Current (SPC) Phenomena on RRAM Crossbar Array and Solutions |
| title_full | Post-Moore Memory Technology: Sneak Path Current (SPC) Phenomena on RRAM Crossbar Array and Solutions |
| title_fullStr | Post-Moore Memory Technology: Sneak Path Current (SPC) Phenomena on RRAM Crossbar Array and Solutions |
| title_full_unstemmed | Post-Moore Memory Technology: Sneak Path Current (SPC) Phenomena on RRAM Crossbar Array and Solutions |
| title_short | Post-Moore Memory Technology: Sneak Path Current (SPC) Phenomena on RRAM Crossbar Array and Solutions |
| title_sort | post moore memory technology sneak path current spc phenomena on rram crossbar array and solutions |
| topic | selectorless resistive switching sneak path current volatile resistive random access memory (RRAM) |
| url | https://www.mdpi.com/2072-666X/12/1/50 |
| work_keys_str_mv | AT yingchenchen postmoorememorytechnologysneakpathcurrentspcphenomenaonrramcrossbararrayandsolutions AT chaochenglin postmoorememorytechnologysneakpathcurrentspcphenomenaonrramcrossbararrayandsolutions AT yaofengchang postmoorememorytechnologysneakpathcurrentspcphenomenaonrramcrossbararrayandsolutions |
