3D Nano Hafnium‐Based Ferroelectric Memory Vertical Array for High‐Density and High‐Reliability Logic‐In‐Memory Application - Jiajie Yu; Tianyu Wang; Chen Lu; Zhenhai Li; Kangli Xu; Yongkai Liu; Yifan Song; Jialin Meng; Hao Zhu; Qingqing Sun; David Wei Zhang; Lin Chen (Advanced Electronic Materials, 2025)
Abstract A new type of ferroelectric memory device with high reliability and complementary metal‐oxide‐semiconductor (CMOS) compatibility characteristics is an important condition for achieving integrated memory and computing chips. Here, 3D stacked ferroelectric memory devices based on ferroelectric materials of HfO2 are fabricated. The device exhibits high speed (50 ns), low read voltage (0.5 V), and great reliability with no substantial degradation after 1010 cycles and a 10‐years data retention at 85 °C. The IMP and NAND logic are achieved with stable memory window (>200 mV) across the vertical devices’ interconnection. On this basis, combining with the traditional CMOS logic device, multiple combination logic functions containing NOT, AND, and NOR are achieved by simulation. The collaboration of devices in the vertical direction providing the possibility of combining multi‐bit logic in memory functions and paves the way for the implementation of high‐density, high‐reliability, and low‐energy consumption computing‐in‐memory chips compatible with the CMOS technology.