High performance quaternary logic designs using GNFETs
The implementations of quaternary circuit schematics are presented in this paper. The quaternary logic is a better choice over the conventional logics because it offers high operating speed, reduced chip area and reduced on-chip interconnects. A new method is presented to design quaternary schematic...
| Published in: | e-Prime: Advances in Electrical Engineering, Electronics and Energy |
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| Main Authors: | , |
| Format: | Article |
| Language: | English |
| Published: |
Elsevier
2023-09-01
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| Subjects: | |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S277267112300092X |
| _version_ | 1850312520815869952 |
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| author | Shaik Javid Basha P. Venkatramana |
| author_facet | Shaik Javid Basha P. Venkatramana |
| author_sort | Shaik Javid Basha |
| collection | DOAJ |
| container_title | e-Prime: Advances in Electrical Engineering, Electronics and Energy |
| description | The implementations of quaternary circuit schematics are presented in this paper. The quaternary logic is a better choice over the conventional logics because it offers high operating speed, reduced chip area and reduced on-chip interconnects. A new method is presented to design quaternary schematics using graphene nanoribbon field effect transistors (GNFETs). The dimer line of graphene nanoribbon (GN) is used to control the threshold voltage of GNFETs. Four quaternary logic inverter circuits such as standard quaternary inverter (SQI), intermediate quaternary inverter (IQI), positive quaternary inverter (PQI) and negative quaternary inverter (NQI) along with the NAND and NOR circuits are proposed. Furthermore, the quaternary half adder circuit is designed that helps to develop complex designs. The HSPICE simulator is utilized for simulating the proposed designs to obtain the performances such as delay, power and power delay product (PDP). The obtained circuit performances are compared with carbon nanotube FETs (CNFETs) based circuits. The comparison results show that the proposed GNFET circuits achieved 53.51% of overall performance improvement over the CNFET circuits. |
| format | Article |
| id | doaj-art-e0a4e59ea94e4b97974eb6bbbc8f9265 |
| institution | Directory of Open Access Journals |
| issn | 2772-6711 |
| language | English |
| publishDate | 2023-09-01 |
| publisher | Elsevier |
| record_format | Article |
| spelling | doaj-art-e0a4e59ea94e4b97974eb6bbbc8f92652025-08-19T23:26:34ZengElseviere-Prime: Advances in Electrical Engineering, Electronics and Energy2772-67112023-09-01510019710.1016/j.prime.2023.100197High performance quaternary logic designs using GNFETsShaik Javid Basha0P. Venkatramana1Research Scholar, Jawaharlal Nehru Technological University Anantapur, Ananthapuramu, India; Corresponding author.Sree Vidyanikethan Engineering College, Tirupati, Affiliated to Jawaharlal Nehru Technological University Anantapur, Ananthapuramu, IndiaThe implementations of quaternary circuit schematics are presented in this paper. The quaternary logic is a better choice over the conventional logics because it offers high operating speed, reduced chip area and reduced on-chip interconnects. A new method is presented to design quaternary schematics using graphene nanoribbon field effect transistors (GNFETs). The dimer line of graphene nanoribbon (GN) is used to control the threshold voltage of GNFETs. Four quaternary logic inverter circuits such as standard quaternary inverter (SQI), intermediate quaternary inverter (IQI), positive quaternary inverter (PQI) and negative quaternary inverter (NQI) along with the NAND and NOR circuits are proposed. Furthermore, the quaternary half adder circuit is designed that helps to develop complex designs. The HSPICE simulator is utilized for simulating the proposed designs to obtain the performances such as delay, power and power delay product (PDP). The obtained circuit performances are compared with carbon nanotube FETs (CNFETs) based circuits. The comparison results show that the proposed GNFET circuits achieved 53.51% of overall performance improvement over the CNFET circuits.http://www.sciencedirect.com/science/article/pii/S277267112300092XGNFETQuaternaryQuaternary half adder and HSPICE |
| spellingShingle | Shaik Javid Basha P. Venkatramana High performance quaternary logic designs using GNFETs GNFET Quaternary Quaternary half adder and HSPICE |
| title | High performance quaternary logic designs using GNFETs |
| title_full | High performance quaternary logic designs using GNFETs |
| title_fullStr | High performance quaternary logic designs using GNFETs |
| title_full_unstemmed | High performance quaternary logic designs using GNFETs |
| title_short | High performance quaternary logic designs using GNFETs |
| title_sort | high performance quaternary logic designs using gnfets |
| topic | GNFET Quaternary Quaternary half adder and HSPICE |
| url | http://www.sciencedirect.com/science/article/pii/S277267112300092X |
| work_keys_str_mv | AT shaikjavidbasha highperformancequaternarylogicdesignsusinggnfets AT pvenkatramana highperformancequaternarylogicdesignsusinggnfets |