STT-HDC: An Efficient Time-Domain In-Memory Hyper-Dimensional Computing Design Based on STT-MRAM

This paper presents an efficient in-memory hyperdimensional computing (HDC) design based on spin transfer-torque magnetoresistive RAM (STT-MRAM), named STT-HDC. A novel time-domain sense amplifier circuit is proposed that significantly simplifies Hamming distance computation of HDC models while dram...

詳細記述

書誌詳細
出版年:IEEE Access
主要な著者: Thi-Nhan Pham, Quang-Kien Trinh, Thanh-Dat Nguyen, Ik-Joon Chang
フォーマット: 論文
言語:英語
出版事項: IEEE 2025-01-01
主題:
オンライン・アクセス:https://ieeexplore.ieee.org/document/10977794/