STT-HDC: An Efficient Time-Domain In-Memory Hyper-Dimensional Computing Design Based on STT-MRAM
This paper presents an efficient in-memory hyperdimensional computing (HDC) design based on spin transfer-torque magnetoresistive RAM (STT-MRAM), named STT-HDC. A novel time-domain sense amplifier circuit is proposed that significantly simplifies Hamming distance computation of HDC models while dram...
| 出版年: | IEEE Access |
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| 主要な著者: | , , , |
| フォーマット: | 論文 |
| 言語: | 英語 |
| 出版事項: |
IEEE
2025-01-01
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| 主題: | |
| オンライン・アクセス: | https://ieeexplore.ieee.org/document/10977794/ |
