Design and Implementation of Seventeen Level Inverter With Reduced Components
The multilevel inverters (MLI) are resourceful in producing a voltage waveform with superior-quality staircase counterfeit sinusoidal and depressed harmonic distortion (THD). Several conventional topologies are proposed to realize the MLI however, the limitations of these topologies may involve more...
| الحاوية / القاعدة: | IEEE Access |
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| المؤلفون الرئيسيون: | , , , , , |
| التنسيق: | مقال |
| اللغة: | الإنجليزية |
| منشور في: |
IEEE
2021-01-01
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| الموضوعات: | |
| الوصول للمادة أونلاين: | https://ieeexplore.ieee.org/document/9334980/ |
| _version_ | 1852647060757544960 |
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| author | C. Dhanamjayulu Devalraju Prasad Sanjeevikumar Padmanaban Pandav Kiran Maroti Jens Bo Holm-Nielsen Frede Blaabjerg |
| author_facet | C. Dhanamjayulu Devalraju Prasad Sanjeevikumar Padmanaban Pandav Kiran Maroti Jens Bo Holm-Nielsen Frede Blaabjerg |
| author_sort | C. Dhanamjayulu |
| collection | DOAJ |
| container_title | IEEE Access |
| description | The multilevel inverters (MLI) are resourceful in producing a voltage waveform with superior-quality staircase counterfeit sinusoidal and depressed harmonic distortion (THD). Several conventional topologies are proposed to realize the MLI however, the limitations of these topologies may involve more DC sources and power-switching devices, and less THD, which in turn, increases the cost and size of the inverter. These drawbacks can be eliminated with the proposed hybrid Cascaded H-Bridge Multilevel Inverter with reduced components topology. As compared with the established MLI topologies the recommended topology having a reduced number of DC sources, power-switching devices, component count level factor, lesser TSV, more efficient, lesser THD, and cost-effective. The proposed MLI is a blend of a single-phase T-Type inverter and an H-Bridge module made of sub switches. This article incorporates the design and simulation of the multilevel inverter with staircase PWM technique. Further, the 9-level and 17-level MLI is examined with different combinational loads. The proposed inverter is stable during nonlinear loads, and it is well suited for FACTS and renewable energy grid-connected applications. An operational guideline has been explained with correct figures and tables. The Output voltage wave is realized in numerical simulation. Finally, the experimental demonstrations were performed by implementing a hardware prototype setup for both linear and nonlinear loads using the dSPACE controller laboratory. |
| format | Article |
| id | doaj-art-eea060bfd19b4b00a9efcd52bc2b9051 |
| institution | Directory of Open Access Journals |
| issn | 2169-3536 |
| language | English |
| publishDate | 2021-01-01 |
| publisher | IEEE |
| record_format | Article |
| spelling | doaj-art-eea060bfd19b4b00a9efcd52bc2b90512025-08-19T21:42:33ZengIEEEIEEE Access2169-35362021-01-019167461676010.1109/ACCESS.2021.30540019334980Design and Implementation of Seventeen Level Inverter With Reduced ComponentsC. Dhanamjayulu0https://orcid.org/0000-0003-0054-0149Devalraju Prasad1https://orcid.org/0000-0001-5192-5837Sanjeevikumar Padmanaban2https://orcid.org/0000-0003-3212-2750Pandav Kiran Maroti3https://orcid.org/0000-0002-2516-9502Jens Bo Holm-Nielsen4https://orcid.org/0000-0002-0797-9691Frede Blaabjerg5https://orcid.org/0000-0001-8311-7412School of Electrical Engineering, Vellore Institute of Technology (VIT) University, Vellore, IndiaSchool of Electrical Engineering, Vellore Institute of Technology (VIT) University, Vellore, IndiaDepartment of Energy Technology, Center for Bioenergy and Green Engineering, Aalborg University, Esbjerg, DenmarkDepartment of Energy Technology, Center for Bioenergy and Green Engineering, Aalborg University, Esbjerg, DenmarkDepartment of Energy Technology, Center for Bioenergy and Green Engineering, Aalborg University, Esbjerg, DenmarkDepartment of Energy Technology, Center of Reliable Power Electronics (CORPE), Aalborg University, Aalborg, DenmarkThe multilevel inverters (MLI) are resourceful in producing a voltage waveform with superior-quality staircase counterfeit sinusoidal and depressed harmonic distortion (THD). Several conventional topologies are proposed to realize the MLI however, the limitations of these topologies may involve more DC sources and power-switching devices, and less THD, which in turn, increases the cost and size of the inverter. These drawbacks can be eliminated with the proposed hybrid Cascaded H-Bridge Multilevel Inverter with reduced components topology. As compared with the established MLI topologies the recommended topology having a reduced number of DC sources, power-switching devices, component count level factor, lesser TSV, more efficient, lesser THD, and cost-effective. The proposed MLI is a blend of a single-phase T-Type inverter and an H-Bridge module made of sub switches. This article incorporates the design and simulation of the multilevel inverter with staircase PWM technique. Further, the 9-level and 17-level MLI is examined with different combinational loads. The proposed inverter is stable during nonlinear loads, and it is well suited for FACTS and renewable energy grid-connected applications. An operational guideline has been explained with correct figures and tables. The Output voltage wave is realized in numerical simulation. Finally, the experimental demonstrations were performed by implementing a hardware prototype setup for both linear and nonlinear loads using the dSPACE controller laboratory.https://ieeexplore.ieee.org/document/9334980/Hybrid cascaded H-bridge multilevel inverter with reduced componentspulse width modulation (PWM)total harmonics distortion (THD) |
| spellingShingle | C. Dhanamjayulu Devalraju Prasad Sanjeevikumar Padmanaban Pandav Kiran Maroti Jens Bo Holm-Nielsen Frede Blaabjerg Design and Implementation of Seventeen Level Inverter With Reduced Components Hybrid cascaded H-bridge multilevel inverter with reduced components pulse width modulation (PWM) total harmonics distortion (THD) |
| title | Design and Implementation of Seventeen Level Inverter With Reduced Components |
| title_full | Design and Implementation of Seventeen Level Inverter With Reduced Components |
| title_fullStr | Design and Implementation of Seventeen Level Inverter With Reduced Components |
| title_full_unstemmed | Design and Implementation of Seventeen Level Inverter With Reduced Components |
| title_short | Design and Implementation of Seventeen Level Inverter With Reduced Components |
| title_sort | design and implementation of seventeen level inverter with reduced components |
| topic | Hybrid cascaded H-bridge multilevel inverter with reduced components pulse width modulation (PWM) total harmonics distortion (THD) |
| url | https://ieeexplore.ieee.org/document/9334980/ |
| work_keys_str_mv | AT cdhanamjayulu designandimplementationofseventeenlevelinverterwithreducedcomponents AT devalrajuprasad designandimplementationofseventeenlevelinverterwithreducedcomponents AT sanjeevikumarpadmanaban designandimplementationofseventeenlevelinverterwithreducedcomponents AT pandavkiranmaroti designandimplementationofseventeenlevelinverterwithreducedcomponents AT jensboholmnielsen designandimplementationofseventeenlevelinverterwithreducedcomponents AT fredeblaabjerg designandimplementationofseventeenlevelinverterwithreducedcomponents |
