Optimized implementation of an improved KNN classification algorithm using Intel FPGA platform: Covid-19 case study
The improved k-nearest neighbor (KNN) algorithm based on class contribution and feature weighting (DCT-KNN) is a highly accurate approach. However, it requires complex computational steps which consumes much time for the classification process. A field programmable gate array (FPGA) can be used to s...
| Published in: | Journal of King Saud University: Computer and Information Sciences |
|---|---|
| Main Authors: | Abedalmuhdi Almomany, Walaa R. Ayyad, Amin Jarrah |
| Format: | Article |
| Language: | English |
| Published: |
Springer
2022-06-01
|
| Subjects: | |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S1319157822001239 |
Similar Items
An OpenCL-based parallel acceleration of aSobel edge detection algorithm Using IntelFPGA technology
by: Abedalmuhdi Almomany, et al.
Published: (2020-07-01)
by: Abedalmuhdi Almomany, et al.
Published: (2020-07-01)
Comparing Portability of FPGA High-Level Synthesis Frameworks in the Context of a Highly-Parallel Application
by: Manuel De Castro, et al.
Published: (2025-01-01)
by: Manuel De Castro, et al.
Published: (2025-01-01)
Algorithms for Fast Spiking Neural Network Simulation on FPGAs
by: Bjorn A. Lindqvist, et al.
Published: (2024-01-01)
by: Bjorn A. Lindqvist, et al.
Published: (2024-01-01)
EDSSA: An Encoder-Decoder Semantic Segmentation Networks Accelerator on OpenCL-Based FPGA Platform
by: Hongzhi Huang, et al.
Published: (2020-07-01)
by: Hongzhi Huang, et al.
Published: (2020-07-01)
FPGA-based heterogeneous acceleration study for multidimensional cubing
by: Meng Yuan, et al.
Published: (2022-01-01)
by: Meng Yuan, et al.
Published: (2022-01-01)
Zynq FPGA-Based Acceleration of Kernelized Correlation Filters via High-Level Synthesis of a Custom DFT Block
by: Enver Çavuş, et al.
Published: (2024-04-01)
by: Enver Çavuş, et al.
Published: (2024-04-01)
Porting MADGRAPH to FPGA Using High-Level Synthesis (HLS)
by: Héctor Gutiérrez Arance, et al.
Published: (2025-06-01)
by: Héctor Gutiérrez Arance, et al.
Published: (2025-06-01)
FCM Clustering Approach Optimization Using Parallel High-Speed Intel FPGA Technology
by: Abedalmuhdi Almomany, et al.
Published: (2022-01-01)
by: Abedalmuhdi Almomany, et al.
Published: (2022-01-01)
An FPGA Accelerator for Molecular Dynamics Simulation Using OpenCL
by: Hasitha Muthumala Waidyasooriya, et al.
Published: (2016-12-01)
by: Hasitha Muthumala Waidyasooriya, et al.
Published: (2016-12-01)
High-Level Annotation of Routing Congestion for Xilinx Vivado HLS Designs
by: Osama Bin Tariq, et al.
Published: (2021-01-01)
by: Osama Bin Tariq, et al.
Published: (2021-01-01)
FPGA design and implementation for adaptive digital chaotic key generator
by: Ghada Elsayed, et al.
Published: (2023-08-01)
by: Ghada Elsayed, et al.
Published: (2023-08-01)
Flexible FPGA 1D DCT hardware architecture for HEVC
by: Hrvoje Mlinarić, et al.
Published: (2023-10-01)
by: Hrvoje Mlinarić, et al.
Published: (2023-10-01)
FPGA design and implementation for montgomery multiplication algorithm using MATLAB HDL coder
by: Ghada Elsayed, et al.
Published: (2024-12-01)
by: Ghada Elsayed, et al.
Published: (2024-12-01)
kNN-STUFF: kNN STreaming Unit for Fpgas
by: Joao Vieira, et al.
Published: (2019-01-01)
by: Joao Vieira, et al.
Published: (2019-01-01)
Design Exploration of AES Accelerators on FPGAs and GPUs
by: Vincenzo Conti, et al.
Published: (2017-03-01)
by: Vincenzo Conti, et al.
Published: (2017-03-01)
ANALYSIS OF TOOLS AND TECHNOLOGIES OF FaaS DEVELOPMENT
by: Инна Николаевна Заризенко, et al.
Published: (2019-12-01)
by: Инна Николаевна Заризенко, et al.
Published: (2019-12-01)
Real-Time FPGA Accelerated Stereo Matching for Temporal Statistical Pattern Projector Systems
by: Zan Brus, et al.
Published: (2021-09-01)
by: Zan Brus, et al.
Published: (2021-09-01)
Open-Source FPGA Implementation of an I3C Controller
by: Jorge André Gastmaier Marques, et al.
Published: (2025-01-01)
by: Jorge André Gastmaier Marques, et al.
Published: (2025-01-01)
Design and Implementation of Discrete Multitone Modulator for Digital Subscriber Line Using FPGA
by: Hadi T. Ziboon, et al.
Published: (2014-08-01)
by: Hadi T. Ziboon, et al.
Published: (2014-08-01)
FPGA Accelerator for 3DES Algorithm Based on OpenCL
by: WU Jianfeng, ZHENG Bowen, NIE Yi, CHAI Zhilei
Published: (2021-12-01)
by: WU Jianfeng, ZHENG Bowen, NIE Yi, CHAI Zhilei
Published: (2021-12-01)
Exploring memory synchronization and performance considerations for FPGA platform using the high-abstracted OpenCL framework: Benchmarks development and analysis
by: Abedalmuhdi Almomany, et al.
Published: (2024-01-01)
by: Abedalmuhdi Almomany, et al.
Published: (2024-01-01)
Robust control of a wind energy conversion system: FPGA real-time implementation
by: Abdelhafid El Attafi, et al.
Published: (2024-08-01)
by: Abdelhafid El Attafi, et al.
Published: (2024-08-01)
Medical Health Big Data Classification Based on KNN Classification Algorithm
by: Wenchao Xing, et al.
Published: (2020-01-01)
by: Wenchao Xing, et al.
Published: (2020-01-01)
PCA and t-SNE Implementation for KNN Hypertension Classification Visualization
by: Andi Aulia Cahyana Resky, et al.
Published: (2025-02-01)
by: Andi Aulia Cahyana Resky, et al.
Published: (2025-02-01)
Hardware implementation of neural network-based engine model using FPGA
by: Marina Magdy Saady, et al.
Published: (2022-12-01)
by: Marina Magdy Saady, et al.
Published: (2022-12-01)
A Novel Scheme for Improving Accuracy of KNN Classification Algorithm Based on the New Weighting Technique and Stepwise Feature Selection
by: Saeid Sheikhi, et al.
Published: (2020-12-01)
by: Saeid Sheikhi, et al.
Published: (2020-12-01)
Longest-First Search Using Bloom Filter: Algorithm and FPGA Implementation
by: Jinsol Lee, et al.
Published: (2025-01-01)
by: Jinsol Lee, et al.
Published: (2025-01-01)
Identification of the freshness level of Tuna based on Discrete Cosine Transform on Feature Extraction of Gray Level Co-Occurrence Matrix using K-Nearest Neighbor
by: Zulfrianto Yusrin Lamasigi, et al.
Published: (2023-04-01)
by: Zulfrianto Yusrin Lamasigi, et al.
Published: (2023-04-01)
Graphics Accelerators: A Review
by: Layla Jamal Hussein, et al.
Published: (2023-04-01)
by: Layla Jamal Hussein, et al.
Published: (2023-04-01)
Research on Convolutional Neural Network Inference Acceleration and Performance Optimization for Edge Intelligence
by: Yong Liang, et al.
Published: (2023-12-01)
by: Yong Liang, et al.
Published: (2023-12-01)
IMPLEMENTATION OF K-NEAREST NEIGHBOUR (KNN) ALGORITHM TO PREDICT STUDENT’S PERFORMANCE
by: Slamet Wiyono, et al.
Published: (2018-11-01)
by: Slamet Wiyono, et al.
Published: (2018-11-01)
Design and Implementation of Gray Scale JPEG CODEC on Spartan-3E
by: Abdulkreem Mohameed Salih, et al.
Published: (2017-02-01)
by: Abdulkreem Mohameed Salih, et al.
Published: (2017-02-01)
Design and Implementation of Gray Scale JPEG CODEC on Spartan-3E
by: Abdulkreem Mohameed Salih, et al.
Published: (2017-02-01)
by: Abdulkreem Mohameed Salih, et al.
Published: (2017-02-01)
Using HLS to Develop FPGA Heterogeneous Acceleration System: Problems, Optimization Methods and Opportunities
by: XU Cheng, GUO Jinyang, LI Chao, WANG Jing, WANG Taolei, ZHAO Jieru
Published: (2023-08-01)
by: XU Cheng, GUO Jinyang, LI Chao, WANG Jing, WANG Taolei, ZHAO Jieru
Published: (2023-08-01)
Real-Time Energy Efficient Hand Pose Estimation: A Case Study
by: Mhd Rashed Al Koutayni, et al.
Published: (2020-05-01)
by: Mhd Rashed Al Koutayni, et al.
Published: (2020-05-01)
Design of Controller for Four-phase Stepping Motor Based on FPGA
by: HUANG Zhi-wen, et al.
Published: (2010-04-01)
by: HUANG Zhi-wen, et al.
Published: (2010-04-01)
Accelerated parallel computation of field quantities for the boundary element method applied to stress analysis using multi-core CPUs, GPUs and FPGAs
by: Junjie Gu, et al.
Published: (2018-01-01)
by: Junjie Gu, et al.
Published: (2018-01-01)
Reliability Improvement of 28 nm Intel FPGA Ring Oscillator PUF for Chip Identification
by: Zulfikar Zulfikar, et al.
Published: (2025-05-01)
by: Zulfikar Zulfikar, et al.
Published: (2025-05-01)
FIDWaC - Fast inverse distance weighting and compressionDatasets
by: Andrzej Łysko, et al.
Published: (2025-09-01)
by: Andrzej Łysko, et al.
Published: (2025-09-01)
Automated Detection and Recognition of Wildlife Using Thermal Cameras
by: Peter Christiansen, et al.
Published: (2014-07-01)
by: Peter Christiansen, et al.
Published: (2014-07-01)
Similar Items
-
An OpenCL-based parallel acceleration of aSobel edge detection algorithm Using IntelFPGA technology
by: Abedalmuhdi Almomany, et al.
Published: (2020-07-01) -
Comparing Portability of FPGA High-Level Synthesis Frameworks in the Context of a Highly-Parallel Application
by: Manuel De Castro, et al.
Published: (2025-01-01) -
Algorithms for Fast Spiking Neural Network Simulation on FPGAs
by: Bjorn A. Lindqvist, et al.
Published: (2024-01-01) -
EDSSA: An Encoder-Decoder Semantic Segmentation Networks Accelerator on OpenCL-Based FPGA Platform
by: Hongzhi Huang, et al.
Published: (2020-07-01) -
FPGA-based heterogeneous acceleration study for multidimensional cubing
by: Meng Yuan, et al.
Published: (2022-01-01)
