Search Results - VLSI SYSTEM DESIGN

The Specialized RF Elements Library for Trusted Transceiver VLSI Design by Denis I. Sotskov, Alexey V. Zubakov, Nikolay A. Usachev, Nikita M. Zhidkov, Alexander G. Kuznetsov, Alexander V. Ermakov, Alexander Y. Nikiforov

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Architecture Design and VLSI Implementation of 3D Hand Gesture Recognition System by Tsung-Han Tsai, Yih-Ru Tsai

“…However, in a noisy environment, it is not easy to correctly extract interesting objects. In this paper, a VLSI design with dual-cameras has been proposed to construct a depth map with a stereo matching algorithm and recognize hand gestures. …”
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Multiple-Clock-Cycle Architecture for the VLSI Design of a System for Time-Frequency Analysis by Ivanović Veselin N, Stojanović Radovan, Stanković L Jubivša

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VLSI design of an irregular LDPC decoder in DTMB by CHEN Yun, ZENG Xiao-yang, LIN Yi-fan, XIANG Bo, DENG Yun-song

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VLSI design of an irregular LDPC decoder in DTMB by CHEN Yun, ZENG Xiao-yang, LIN Yi-fan, XIANG Bo, DENG Yun-song

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Trusted and controlled design route complex-functional VLSI using foreign and domestic CAD systems by Sergey G. Bobkov, Boris E. Evlampiev

“…The article discusses the design flow for complex functional VLSI circuits at the stage of synthesis and physical synthesis using foreign and domestic CAD systems, which makes it possible to ensure, on the one hand, the characteristics of the VLSI in accordance with the capabilities of foreign CAD systems, on the other hand, to exclude undeclared functions that are possible due to use of Western CAD systems. …”
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Best Response Dynamics for VLSI Physical Design Placement by Michael Rapoport, Tami Tamir

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VLSI Synthesis for Low-Power Clocking in Synchronous Designs by Naseer Alwan Hussein, Maan Hameed, Luay Ali Khamees

“…This paper explores the evolution from these challenges to a paradigm where advancements in VLSI technology have resulted in smaller, more affordable, reliable, and power-efficient systems. …”
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Noise-Aware and Light-Weight VLSI Design of Bilateral Filter for Robust and Fast Image Denoising in Mobile Systems by Sung-Joon Jang, Youngbae Hwang

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Early Area and Power Estimation Model for Rapid System Level Design and Design Space Exploration by Abhishek Narayan Tripathi, Arvind Rajawat

“…Power and area estimation in the early stage of designing is very critical for a system. This paper presents the neural network-based early area and power estimation model. …”
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Compact MOSFET Modeling for Process Variability-Aware VLSI Circuit Design by Samar K. Saha

“…This paper presents a systematic methodology to develop compact MOSFET models for process variability-aware VLSI circuit design. Process variability in scaled CMOS technologies severely impacts the functionality, yield, and reliability of advanced integrated circuit devices, circuits, and systems. …”
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Design and Realization of a New Signal Security System for Multimedia Data Transmission by Hun-Chen Chen, Jiun-In Guo, Lin-Chieh Huang, Jui-Cheng Yen

“…We have performed Matlab simulation to verify the functional correctness of the proposed system. In implementing the system, a low-cost VLSI architecture has been designed, verified, and physically realized based on a 0.35 μm CMOS technology. …”
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Guest Editorial : 26th International Symposium on VLSI Design and Test 2022 by Ambika Prasad Shah, Bhupendra Singh Reniwal

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Advances in VLSI testing at MultiGb per second rates by Topisirović Dragan

“…Today's high performance manufacturing of digital systems requires VLSI testing at speeds of multigigabits per second (multiGbps). …”
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DESIGN AND ANALYSIS OF LOW POWER MULTIPLY AND ACCUMULATE UNIT USING PIXEL PROPERTIES REUSABILITY TECHNIQUE FOR IMAGE PROCESSING SYSTEMS by M. Madheswaran, S. Saravanan

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VLSI Design and FPGA Implementation of an NTT Hardware Accelerator for Homomorphic SEAL-Embedded Library by Stefano Di Matteo, Matteo Lo Gerfo, Sergio Saponara

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A VLSI Architecture for the V-BLAST Algorithm in Spatial-Multiplexing MIMO Systems by Pedro Cervantes-Lozano, Luis F. González-Pérez, Andrés D. García-García

“…This paper presents a VLSI architecture for the suboptimal hard-output Vertical-Bell Laboratories Layered Space-Time (V-BLAST) algorithm in the context of Spatial Multiplexing Multiple-Input Multiple-Output (SM-MIMO) systems immersed in Rayleigh fading channels. …”
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VLSI Design Based on Block Truncation Coding for Real-Time Color Image Compression for IoT by Shih-Lun Chen, He-Sheng Chou, Shih-Yao Ke, Chiung-An Chen, Tsung-Yi Chen, Mei-Ling Chan, Patricia Angela R. Abu, Liang-Hung Wang, Kuo-Chen Li

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Efficient VLSI Architecture for Training Radial Basis Function Networks by Wen-Jyi Hwang, Zhe-Cheng Fan

“…This paper presents a novel VLSI architecture for the training of radial basis function (RBF) networks. …”
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FPGA Implementation of Mean – Max Membership basedDefuzzifier Unit by Asim M. Murshid

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