Design of Capacitor Array in 16-Bit Ultra High Precision SAR ADC for the Wearable Electronics Application

Design of Capacitor Array in 16-Bit Ultra High Precision SAR ADC for the Wearable Electronics Application

This paper proposes a 16-bit 6-channel high-voltage successive approximation register (SAR) ADC with an optimized 5 + 5 + 6 segmented capacitor array. The lower 10 bits of the capacitor array are all composed of unit capacitors without any calibration unit. Without calibration, the lower 10 bits of...

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Bibliographic Details
Main Authors: Yuanjun Cen, Wei Feng, Ping Yang, Hua Fan, Yongkai Li, Yi Niu, Zhikai Liao, Xu Qi, Bo Wang, Yan Ran, Wei Li, Quanyuan Feng, Hadi Heidari
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Access
Subjects:
Segmented capacitor array
SAR ADC
linearity error
calibration
Online Access:https://ieeexplore.ieee.org/document/9200325/

Internet

https://ieeexplore.ieee.org/document/9200325/

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