Brief announcement: Distributed shared memory based on computation migration

Driven by increasingly unbalanced technology scaling and power dissipation limits, microprocessor designers have resorted to increasing the number of cores on a single chip, and pundits expect 1000-core designs to materialize in the next few years [1]. But how will memory architectures scale and how...

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Bibliographic Details
Main Authors: Lis, Mieszko (Contributor), Shim, Keun Sup (Contributor), Cho, Myong Hyon (Contributor), Fletcher, Christopher Wardlaw (Contributor), Kinsy, Michel A. (Contributor), Lebedev, Ilia A. (Contributor), Khan, Omer (Contributor), Devadas, Srinivas (Contributor)
Other Authors: Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory (Contributor), Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science (Contributor)
Format: Article
Language:English
Published: Association for Computing Machinery (ACM), 2012-08-27T20:39:51Z.
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