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1“... to investigate the high frequency behaviors of negative resistance cells when designing MMW CMOS VCOs. Several...”
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2“... introduced a 71-76 GHz balanced resistive gate-pumped mixer using in pHEMT process. Based on this topology, a...”
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3“.... Therefore, to design a high frequency oscillator with low phase noise is important. The goal of the thesis...”
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4“... to those in GaAs HEMT process. The second part of the dissertation presents a new method to design band...”
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5“... are minimized. The first BDA is realized in 90-nm CMOS process. From 57 to 66 GHz, in receiving mode, the gain...”
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6“...碩士 === 國立臺灣大學 === 電信工程學研究所 === 105 === This thesis demonstrates the design and measurement results...”
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7“... with wide tuning range and low phase noise is implemented in CMOS 0.18 μm process. By using the new...”
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8“... parts. The first part introduced a 15-50 GHz doubly balanced resistive ring mixer using CMOS process...”
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9“...) in 0.18-μm CMOS and comparable performance with the DAs in advanced process. The third part is a power...”
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10“... phase variation and high gain control range VGA using 65-nm CMOS process is applied on a 38 GHz phased...”
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11“... process. The second amplifier is a distributed amplifier using high-pass transmission lines, and its...”
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12“...) are designed, and implemented using CMOS process. LNA is the critical component in the RF front-end circuits...”
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13“...), is proposed. In order to implement this idea, first we design and measure a single-pole-single-throw (SPST...”
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14“... was fabricated in a low-cost process while demonstrating the low phase noise. This chip is also the first 0.35-μm...”
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15“... on the same die, thereby reducing the production cost. However, compared to GaAs processes, the inherent...”
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16“... high gain low noise amplifier in WIN 0.1-μm process for radio astronomy application. The measurement...”
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17“...博士 === 臺灣大學 === 電信工程學研究所 === 98 === In this dissertation, the designs and analysis of RF...”
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18“... in TSMC 90-nm CMOS process. In order to improve the I/Q mismatch in the design of quadrature phase, a co...”
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19“...碩士 === 國立臺灣大學 === 電信工程學研究所 === 107 === This thesis presents the design and measurement results of a...”
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20“... broadband power amplifier using 0.18-μm CMOS process. The physical limitations for designing the transformer...”
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