An 18-bit Oversampling Audio Delta Sigma D/A Converter Design
碩士 === 國立臺北大學 === 電機工程研究所 === 97 === A sigma-delta third order dual truncation MASH 2-1 D/A converter with 18-bit input format is successfully implemented in 0.18um SMIC technology. This design focuses on the digital implementation of 64x upsampling digital interpolator and third-order deltasigma MA...
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| Format: | Others |
| Language: | en_US |
| Online Access: | http://ndltd.ncl.edu.tw/handle/99131692862479578185 |