Instruction scheduling and software pipelining for modern architectures

We describe the approach for instruction scheduling and software pipelining based on a two-stage extensible architecture of detecting and using the available instruction level parallelism. The detection stage is based on a selective scheduling approach and consists of a kernel supporting instruction...

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Bibliographic Details

Published in:	Труды Института системного программирования РАН
Main Author:	Arutyun Avetisyan
Format:	Article
Language:	English
Published:	Russian Academy of Sciences, Ivannikov Institute for System Programming 2018-10-01
Subjects:	планирование команд конвейеризация циклов спекулятивное выполнение условное выполнение
Online Access:	https://ispranproceedings.elpub.ru/jour/article/view/1000