A Real-Time Naive Bayes Classifier Accelerator on FPGA
In this paper, we propose a real-time hardware naive Bayes classifier (NBC) which is implemented on field programmable gate array (FPGA). We first use logarithm transformation based look-up table and float-to-fixed point process to simplify the calculations in naive Bayes classification algorithm. T...
| Published in: | IEEE Access |
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| Main Authors: | , , |
| Format: | Article |
| Language: | English |
| Published: |
IEEE
2020-01-01
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| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/9018000/ |