High-Level Synthesis Hardware Design for FPGA-Based Accelerators: Models, Methodologies, and Frameworks

Hardware accelerators based on field programmable gate array (FPGA) and system on chip (SoC) devices have gained attention in recent years. One of the main reasons is that these devices contain reconfigurable logic, which makes them feasible for boosting the performance of applications. High-level s...

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Bibliographic Details

Published in:	IEEE Access
Main Authors:	Romina Soledad Molina, Veronica Gil-Costa, Maria Liz Crespo, Giovanni Ramponi
Format:	Article
Language:	English
Published:	IEEE 2022-01-01
Subjects:	Computing models design space exploration field programmable gate array (FPGA) system on chip (SoC) power consumption
Online Access:	https://ieeexplore.ieee.org/document/9864576/