High-performance full adder design based on SRPL
The adder circuit is the core component of the high-performance system-on-chip (SoC). It is also important in image and voice encryption. The full adder circuit is a basic unit with a very high reuse rate among all the units. Therefore, the design of an adder with high energy efficiency is of great...
| 出版年: | 工程科学学报 |
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| 主要な著者: | , , , |
| フォーマット: | 論文 |
| 言語: | 中国語 |
| 出版事項: |
Science Press
2020-08-01
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| 主題: | |
| オンライン･アクセス: | http://cje.ustb.edu.cn/article/doi/10.13374/j.issn2095-9389.2019.08.03.001 |