A True Random Number Generator Based on Race Hazard and Jitter of Braided and Cross-Coupled Logic Gates Using FPGA

In the contemporary digital landscape, security has become a vital element of our existence. The growing volume of sensitive information being stored and transmitted over networks necessitates the implementation of robust security measures. Cryptographic algorithms, which are critical for protecting...

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Bibliographic Details

Published in:	IEEE Access
Main Authors:	Hossam O. Ahmed, Donghoon Kim, William J. Buchanan
Format:	Article
Language:	English
Published:	IEEE 2024-01-01
Subjects:	True random number generator (TRNG) race hazard ring oscillator field programmable gate array (FPGA) jitter
Online Access:	https://ieeexplore.ieee.org/document/10778488/