Design and Assessment of Hybrid MTJ/CMOS Circuits for In-Memory-Computation
Hybrid magnetic tunnel junction/complementary metal oxide semiconductor (MTJ/CMOS) circuits based on in-memory-computation (IMC) architecture is considered as the next-generation candidate for the digital integrated circuits. However, the energy consumption during the MTJ write process is a matter o...
| Published in: | Journal of Low Power Electronics and Applications |
|---|---|
| Main Authors: | , , , |
| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2024-01-01
|
| Subjects: | |
| Online Access: | https://www.mdpi.com/2079-9268/14/1/3 |
