The Effects of Comparator Dynamic Capacitor Mismatch in SAR ADC and Correction

This paper proposes a method of correcting the nonlinear parasitic capacitor of the input pair of comparator in successive approximations analog-to-digital converters (SAR ADCs). The correction method is proposed for the conventional binary-weighted capacitor array topology used in most of high reso...

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Bibliographic Details

Published in:	IEEE Access
Main Authors:	Jian Luo, Jing Li, Ning Ning, Yang Liu, Qi Yu
Format:	Article
Language:	English
Published:	IEEE 2018-01-01
Subjects:	Nonlinear parasitic capacitor high resolution successive approximation register analog-to-digital converter dynamic capacitor mismatch
Online Access:	https://ieeexplore.ieee.org/document/8268117/