Quenching Circuit and SPAD Integrated in CMOS 65 nm with 7.8 ps FWHM Single Photon Timing Resolution

This paper presents a new quenching circuit (QC) and single photon avalanche diode (SPAD) implemented in TSMC CMOS 65 nm technology. The QC was optimized for single photon timing resolution (SPTR) with a view to an implementation in a 3D digital SiPM. The presented QC has a timing jitter of 4 ps ful...

詳細記述

書誌詳細
出版年:Instruments
主要な著者: Frédéric Nolet, Samuel Parent, Nicolas Roy, Marc-Olivier Mercier, Serge A. Charlebois, Réjean Fontaine, Jean-Francois Pratte
フォーマット: 論文
言語:英語
出版事項: MDPI AG 2018-09-01
主題:
オンライン・アクセス:http://www.mdpi.com/2410-390X/2/4/19