CHERI-Crypt: Transparent Memory Encryption on Capability Architectures

Capability architectures such as CHERI (Capability Hardware Enhanced RISC Instructions) are an emerging technology designed to provide memory safety protection at the hardware level and are equipped to eradicate approximately 70% of the current software vulnerability attack surface. CHERI is an ins...

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Bibliographic Details
Published in:Transactions on Cryptographic Hardware and Embedded Systems
Main Authors: Jennifer Jackson, Minmin Jiang, David Oswald
Format: Article
Language:English
Published: Ruhr-Universität Bochum 2025-03-01
Subjects:
Memory Encryption
CHERI
RISC-V
Capability Architectures
Confidential Computing
Trusted Execution Environments
Online Access:https://tches.iacr.org/index.php/TCHES/article/view/12048

Internet

https://tches.iacr.org/index.php/TCHES/article/view/12048

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