Fabrication and Characterization of Stacked Poly-Si Nanosheet With Gate-All-Around and Multi-Gate Junctionless Field Effect Transistors
Present work demonstrates the vertically double stacked nanosheet (NS) p-channel polycrystalline silicon (poly-Si) junctionless field-effect transistors (JL-FET) with tri-gate, omega-gate, and gate all around (GAA) structure. These structures offer more W<sub>eff</sub> per existing footp...
| 出版年: | IEEE Journal of the Electron Devices Society |
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| 主要な著者: | , , , , , , , |
| フォーマット: | 論文 |
| 言語: | 英語 |
| 出版事項: |
IEEE
2019-01-01
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| 主題: | |
| オンライン･アクセス: | https://ieeexplore.ieee.org/document/8894119/ |