DESIGN AND IMPLEMENTATION OF A VHDL PROCESSOR FOR DCT BASED IMAGE COMPRESSION

This paper describes the design and implementation of a VHDL processor meant for performing 2D-Discrete Cosine Transform (DCT) to use in image compression applications. The design flow starts from the system specification to implementation on silicon and the entire process is carried out using an ad...

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Bibliographic Details

Published in:	ASEAN Journal on Science and Technology for Development
Main Authors:	Md. Shabiul Islam, M.S. Bhuyan, M. Salim Beg, Masuri Othman
Format:	Article
Language:	English
Published:	Universiti Brunei Darussalam 2017-11-01
Subjects:	VHDL processor 2D-Discrete Cosine Transform
Online Access:	http://www.ajstd.org/index.php/ajstd/article/view/211