Design and Implementation of Parallel Bypass Bin Processing for CABAC Encoder

The ever-increasing demand for high-quality digital video requires efficient compression techniques and fast video codecs. It necessitates increased complexity of the video codec algorithms. So, there is a need for hardware accelerators to implement such complex algorithms. The latest video compress...

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Bibliographic Details

Published in:	Advances in Electrical and Electronic Engineering
Main Authors:	Nagaraju Mamidi, Santosh Kumar Gupta, Vijaya Bhadauria
Format:	Article
Language:	English
Published:	VSB-Technical University of Ostrava 2021-01-01
Subjects:	asic bypass bin cabac fpga hevc vvc.
Online Access:	http://advances.utc.sk/index.php/AEEE/article/view/4010