Automated generation of machine instruction decoders

This paper proposes a method of automated generation of machine instruction decoders for various processor architectures, mainly microcontrollers. Only minimal, high-level input from user is required: a set of assembly instruction templates and a list of register names. The method utilises the targe...

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Bibliographic Details

Published in:	Труды Института системного программирования РАН
Main Authors:	N. Yu. Fokina, M. A. Solovev
Format:	Article
Language:	English
Published:	Russian Academy of Sciences, Ivannikov Institute for System Programming 2018-10-01
Subjects:	декодер микроконтроллер бинарный код автоматизированная генерация система команд
Online Access:	https://ispranproceedings.elpub.ru/jour/article/view/482