Showing 41 - 60 results of 64 for search 'Chung-Len, Lee', query time: 0.12s Refine Results
  1. 41
    Test pattern generators using BDD and MTBDD
    by Yuan-Jie Chen, 陳淵傑
    Published 1994
    Other Authors: “...Chung-Len Lee...”
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  2. 42
    A parallel-pattern parallel-fault fault simulation engine for synchronous sequential circuits
    by Tzong-Honge Shieh, 謝宗宏
    Published 1994
    Other Authors: “...Chung-Len Lee...”
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  3. 43
    The Distributed Test Generation for Sequential Circuits
    by Sin-Hwa Wang, 王信華
    Published 1993
    Other Authors: “...Chung-Len Lee...”
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  4. 44
    A Time_Saving Structural Testing Scheme For Mask_ROM
    by Tsung-Chin Wu, 吳聰志
    Published 1994
    Other Authors: “...Chung-Len Lee...”
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  5. 45
    Fault Diagnosis for Delta-Sigma Modulator
    by Wei-Xian Chen, 陳威憲
    Published 2005
    Other Authors: “...Chung-Len Lee...”
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  6. 46
    High Reliability Thin Oxides Prepared with the Disilane-based Polysilicon Films and CF4 Plasma Pre-treatment
    by Jam Wem Lee, 李介文
    Published 2001
    Other Authors: “...Chung_Len Lee...”
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  7. 47
    A numerical simulation for a gated field emission triode considering temperature effect
    by Su Tai, 蘇泰
    Published 1993
    Other Authors: “...Chung-Len Lee...”
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  8. 48
    Generation and Application of Universal Test Sets
    by Beyin Chen, 陳碧茵
    Published 1995
    Other Authors: “...Chung Len Lee...”
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  9. 49
    Simplifying Sequential Circuit Testing
    by Meng-Lieh Sheu, 許孟烈
    Published 1995
    Other Authors: “...Chung-Len Lee...”
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  10. 50
    Testing and Multilevel Synthesis for Multiple-Valued Logic Circuits
    by Hui-Min Wang, 王慧民
    Published 1995
    Other Authors: “...Chung-Len Lee...”
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  11. 51
    Effects of NH3-Annealing on Polysilicon Thin Film Transistor
    by Wen-Cheng Yen, 顏文正
    Published 1995
    Other Authors: “...Chung-Len Lee...”
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  12. 52
    A Fault Simulator Based on Software Emulation
    by Tzung-Ping Chou, 周宗平
    Published 1995
    Other Authors: “...Chung-Len Lee...”
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  13. 53
    Fault Diagnosis of Odd-Even Sorting Networks
    by Chih-Wei Hu, 胡志維
    Published 1995
    Other Authors: “...Chung-Len Lee...”
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  14. 54
    BIST Burn-in Methodology for the CMOS Circuit
    by Ping Liu, 劉坪
    Published 2005
    Other Authors: “...Chung Len Lee...”
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  15. 55
    OR-Test for Asynchronous Sequential Circuits
    by Chun Yen Lin, 林俊言
    Published 2005
    Other Authors: “...Chung Len Lee...”
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  16. 56
    Investigation of Nickel Silicide Application toward Nano-Scale Device Technology
    by Tsung-Lin Lee, 李宗霖
    Published 2004
    Other Authors: “...Chung-Len Lee...”
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  17. 57
    On-Chip Jitter Measurement for Phase-Locked Loops
    by Chin-Cheng Tsai, 蔡進成
    Published 2002
    Other Authors: “...Prof. Chung-Len Lee...”
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  18. 58
    Hierarchical Fault Model and Its Test Pattern Generation
    by Yin-Chao Huang, 黃英兆
    Published 1999
    Other Authors: “...Prof. Chung-Len Lee...”
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  19. 59
    Interconnect-Centric Oscillation Ring Architectures and Algorithms for SoC Testability and Yield Enhancement
    by Katherine Shu-Min Li, 李淑敏
    Published 2005
    Other Authors: “...Prof. Chung Len Lee...”
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  20. 60
    Study of Process Effects on Polycrystalline-Silicon Thin-Film Transistor
    by Yang ,Chien-Kuo, 楊健國
    Published 1996
    Other Authors: “...Tan-Fu Lei，Chung-Len Lee...”
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