Showing 161 - 180 results of 182 for search 'Jing Jia', query time: 0.12s Refine Results
  1. 161
    Exploring Linear Structures of Critical Path Delay Faults to Reduce Test Efforts
    by Shun-Yen Lu, 盧順彥
    Published 2006
    Other Authors: “...Jing-Jia Liou...”
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  2. 162
    A non-blocking locking mechanism using non-atomic instructions for bare-metal Pthread porting
    by Chang, Jing Kun, 張景焜
    Published 2014
    Other Authors: “...Liou, Jing Jia...”
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  3. 163
    A BIST Implementation for Network on a Chip
    by Luo, Huai-Syuan, 駱懷瑄
    Published 2014
    Other Authors: “...Liou, Jing-Jia...”
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  4. 164
    Chip Clustering with Mutual Information on Multiple Clock Tests and its Application to Yield Tuning
    by Chiang, Jiun-Yi, 江俊毅
    Published 2014
    Other Authors: “...Liou, Jing-Jia...”
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  5. 165
    A Variability Regression Model for Failure Path Prediction
    by Hsu, Chih-Hsiang, 徐志祥
    Published 2014
    Other Authors: “...Liou, Jing-Jia...”
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  6. 166
    Design of a Non-blocking Communication Engine for NoC-based Platforms
    by Chen, Wen-Sheng, 陳文笙
    Published 2014
    Other Authors: “...Liou, Jing-Jia...”
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  7. 167
    Delay Fault Diagnosis Techniques Targeting on Both Spot Delay Defects and Systematic Process Variations
    by Chen, Ying-Yen, 陳瑩晏
    Published 2009
    Other Authors: “...Liou, Jing-Jia...”
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  8. 168
    Handing Pattern-dependent Delay Faults in Diagnosis
    by Jyun-Wei Chen, 陳浚瑋
    Published 2007
    Other Authors: “...Jing-Jia Liou...”
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  9. 169
    IR Drop Estimation Based on Cell Current Waveform Characterizations
    by Chia-Yu Ko, 柯佳佑
    Published 2007
    Other Authors: “...Jing-Jia Liou...”
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  10. 170
    Systematic Variation Model Extraction Based on Lens-Aberration Simulation and its Application to Path Delay Estimation
    by Ruei-Sen Li, 李瑞森
    Published 2007
    Other Authors: “...Jing-Jia Liou...”
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  11. 171
    Real-Time Power Measurements of an Embedded System
    by Hsieh, Ching-Chou, 謝青州
    Published 2010
    Other Authors: “...Liou, Jing-Jia...”
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  12. 172
    A Post-Silicon Voltage-tuning Methodology for Process Variation based on Diagnosis Results
    by Wu, Kuo-Li, 吳國立
    Published 2010
    Other Authors: “...Liou, Jing-Jia...”
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  13. 173
    適用於診斷JPEG解碼器晶片之高階轉態延遲錯誤模擬器
    by Chien, Tso-Hua, 簡佐樺
    Published 2010
    Other Authors: “...Liou, Jing-Jia...”
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  14. 174
    A Satisfiability-Based Auto Test Pattern Generation for Path Delay Faults
    by Chih-HungWu, 吳志鴻
    Published 2005
    Other Authors: “...Jing-Jia Liou...”
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  15. 175
    High Quality LFSR selection for Delay Fault BIST
    by Shen-Feng Chen, 陳申峰
    Published 2005
    Other Authors: “...Jing-Jia Liou...”
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  16. 176
    Path Delay Fault Collapsing by Linear Structures of Critical Paths
    by Pei-Ying Hsieh, 薛培英
    Published 2006
    Other Authors: “...Jing-Jia Liou...”
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  17. 177
    Hardware-based Pseudo-exhaustive Test Pattern Generation for Delay Faults
    by Sel-Lung Chen, 陳森龍
    Published 2005
    Other Authors: “...Jing-Jia Liou...”
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  18. 178
    具有動態電壓與頻率調節鏈結之晶片內網路的能量和時序模型及其在能量最佳化上的應用
    by Yu, Tsung-Sheng, 余宗盛
    Published 2011
    Other Authors: “...Liou, Jing-Jia...”
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  19. 179
    Cost Reduction of System-level Tests with Stressed Structural Tests and SVM
    by Hsieh, Meng Ta, 謝孟達
    Published 2015
    Other Authors: “...Liou, Jing Jia...”
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  20. 180
    FlexDRAM- A DRAM System Simulator in SystemC for Design Exploration
    by Hsu, Hau, 許浩
    Published 2015
    Other Authors: “...Liou, Jing-Jia...”
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