Showing 41 - 59 results of 59 for search 'King, Ya-Chin', query time: 0.12s Refine Results
  1. 41
    A New Logic-Compatible Differential Self-Selective Program Multiple-Time Programmable Non-Volatile Memory Cell
    by Yang, Hsiao-Lan, 楊筱嵐
    Published 2009
    Other Authors: “...King, Ya-Chin...”
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  2. 42
    生醫應用感測元件與感測電路架構之研究
    Other Authors: “...King, Ya-Chin...”
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  3. 43
    Novel 600V-Class Charge-Balance-Enhanced Super Junction Power MOSFET (CBE-SJ MOS)
    by Hsieh, Pei-Shan, 謝佩珊
    Published 2009
    Other Authors: “...King, Ya-Chin...”
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  4. 44
    Current-Mode Ambient Light Sensor for Ultra Low Power Applications
    by Tsai, Tsung Yu, 蔡宗諭
    Published 2014
    Other Authors: “...King, Ya-Chin...”
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  5. 45
    Measurement and Characterization of Tip Tunneling Diode
    by Gu, Min-Siang, 辜民翔
    Published 2014
    Other Authors: “...King, Ya-Chin...”
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  6. 46
    Study of Highly-Scalable and Logic-Compatible Non-Volatile Memories
    by Tsai, Yi-Hung, 蔡怡宏
    Published 2009
    Other Authors: “...King, Ya-Chin...”
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  7. 47
    A Study on Nano-Scale SONOS-Type NAND Flash Memory Technologies
    by Hsu, Tzu-Hsuan, 徐子軒
    Published 2009
    Other Authors: “...King, Ya-Chin...”
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  8. 48
    The Study of Low Voltage and Low Capacitance Transient Voltage Suppressor
    by Dai, Sheng-Huei, 戴聖輝
    Published 2010
    Other Authors: “...King, Ya-Chin...”
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  9. 49
    Investigation of Embedded Low-Temperature Polysilicon Non-Volatile Memory
    by Hsieh, Szu-I, 謝思義
    Published 2012
    Other Authors: “...King, Ya-Chin...”
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  10. 50
    A study of Contact Resistive Random Access Memory Unit Cell and Array
    by Hsu, Li Ming, 徐立明
    Published 2015
    Other Authors: “...King,Ya-Chin...”
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  11. 51
    Parasitic Capacitance Extraction Method by Metal-Gate-Coupling Structure for Non-Planar Transistors
    by Lin, Po-Yen, 林伯諺
    Published 2015
    Other Authors: “...King, Ya-Chin...”
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  12. 52
    A Study of Resistive Random Access Memory in FinFET and Its Carrier Transport Model
    by Huang,Kai Ping, 黃凱平
    Published 2016
    Other Authors: “...King,Ya-Chin...”
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  13. 53
    A Study of Impact of Distributed Cycling and Dummy Read Operation on Endurance of NAND Flash memory
    by Wu, Dai Yan, 吳岱晏
    Published 2016
    Other Authors: “...King, Ya Chin...”
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  14. 54
    A Novel CMOS Logic Compatible Shallow Trench Isolation Sidewall edge Resistive Random Access Memory
    by Liao, Chu Feng, 廖矩鋒
    Published 2016
    Other Authors: “...King, Ya Chin...”
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  15. 55
    A Study of Drain Extended FinFETs for High-Voltage Application
    by Chen, Hsien Hao, 陳賢昊
    Published 2016
    Other Authors: “...King, Ya-Chin...”
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  16. 56
    Study of High-density 3D Via Resistive Random Access Memory in Nanoscale CMOS Technologies
    by Hsieh, Min-Che, 謝旻哲
    Published 2016
    Other Authors: “...King, Ya-Chin...”
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  17. 57
    Magnetic Wireless Interlayer Transmission Module through Perpendicular MTJ for 3D-IC Applications
    by Chang, Liang-Shun, 張良順
    Published 2016
    Other Authors: “...King,Ya-Chin...”
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  18. 58
    Electrical Study of Vertical Gate (VG) Type 3D NAND Flash Memory Technology
    by Yeh, Teng-Hao, 葉騰豪
    Published 2016
    Other Authors: “...King, Ya-Chin...”
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  19. 59
    The Study of Backfill Contact Resistive Random Access Memory in CMOS logic Technologies
    by Chen, Hung-Yu, 陳宏昱
    Published 2015
    Other Authors: “...King,Ya-Chin...”
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