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Ueng, Yeong-Luh
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Ueng, Yeong-Luh
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Ueng, Yeong-Luh
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61
A Hardware Design of LDPC Coded Modulation Scheme for Flash Memory Applications
by
Kuan, Ting Yu
,
官亭宇
Published 2015
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...
Ueng
,
Yeong
Luh
...
”
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62
Constructions of QC-LDPC Code Based on Masking and PDF
by
Yang, Jheng Jhe
,
楊政哲
Published 2015
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...
Ueng
,
Yeong
Luh
...
”
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63
Implementation of Flexible QC-LDPC codec on FPGA
by
Hou, Ying Chi
,
侯盈吉
Published 2015
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...
Ueng
,
Yeong
Luh
...
”
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64
Decoding Scheduling for Low-Density Parity-Check Codes
by
Lee, Huang-Chang
,
李晃昌
Published 2014
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Ueng
,
Yeong
-
Luh
...
”
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65
A Hardware-friendly Error- floor Lowering Technique for High-rate QC-LDPC Codes
by
Hsieh, Chieh-Shen
,
謝杰燊
Published 2014
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...
Ueng
,
Yeong
-
Luh
...
”
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66
Constructions of RC-LDPC Code Based on Splitting and Extending
by
Huang,Yi Tsun
,
黃亦村
Published 2015
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Ueng
,
Yeong
Luh
...
”
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67
An Efficient Layered Decoder Architecture with Error-Floor Lowering Technique for High-Rate QC-LDPC Codes
by
Chou, Po Chiao
,
周伯橋
Published 2015
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Ueng
,
Yeong
Luh
...
”
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68
A Shuffled LDPC Decoder Architecture for Error-Floor Evaluation
by
Chen, Chu Tian
,
陳楚天
Published 2015
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Ueng
,
Yeong
Luh
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