Showing 1 - 15 results of 15 for search '陳信樹', query time: 0.09s Refine Results
  1. 1
    A Dual-Mode Control and Linear-Scaling Gate Drive Voltage Technique of DC-DC Buck Converter
    by Wei-Shan Ye, 葉偉賢
    Published 2010
    Other Authors: “...陳信樹...”
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  2. 2
    A Closed-Loop Gain-Error Self-Calibration Technique for Pipelined ADCs
    by Wei-Ting Shen, 沈威廷
    Published 2010
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  3. 3
    An Ultra-low Power Analog to Digital Converter
    by Hung-Yen Tai, 戴宏彥
    Published 2010
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  4. 4
    A high-speed 6b Dynamic Folding Flash A/D Converter
    by Hong-Lin Chen, 陳泓霖
    Published 2010
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  5. 5
    Energy Efficient Nyquist Rate Analog to Digital Converters
    by Hung-Wei Kevin Chen, 陳宏維
    Published 2012
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  6. 6
    A 1.2V 10-bit High-Speed Pipelined ADC
    by Huan-Chieh Tseng, 曾煥傑
    Published 2008
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  7. 7
    A 1GS/s 6-bit 48mW A/D Converter
    by I-Ching Chen, 陳翊青
    Published 2007
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  8. 8
    A low-power fast-lock digital Delay-Locked Loop
    by Jyun-Cheng Lin, 林俊成
    Published 2007
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  9. 9
    A new switching scheme for parabolic error compensation in 10 bit CMOS current steering digital to analog converter
    by Cheng-Feng Chung, 鍾政峰
    Published 2006
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  10. 10
    A 10-bit 250MS/s pipelined ADC
    by Jian-Feng Shiu, 許健豐
    Published 2007
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  11. 11
    A Quadratic Error Compensation in High-Speed 8-bit Current-Steering Digital to Analog Converter
    by Chien-Chun Huang, 黃健群
    Published 2009
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  12. 12
    A Single-channel, 1.2GS/s, 6-bit, 2-bit/cycle SAR ADC
    by Sheng-Wei Lin, 林昇緯
    Published 2013
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  13. 13
    A Low Power Pipelined ADC Using Time-Domain MDAC For Residue Amplification
    by Chun-Wei Chang, 張鈞維
    Published 2013
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  14. 14
    A Low Power Pipeline ADC Using Time-Domain Transfer Technique
    by Yu-Wei Chuang, 莊郁暐
    Published 2016
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  15. 15
    Power-Efficient Successive-Approximation Register Analog-to-Digital Converter
    by Bo-Shi Liao, 廖柏詩
    Published 2016
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