Showing 1 - 20 results of 52 for search 'Chau Chin Su', query time: 0.11s Refine Results
  1. 1
    Design and Implementation of Noncoherent Data Demodulation Circuit for CDMA IS-95 Receiver
    by Liu, Jian-Shing, 劉建興
    Published 1998
    Other Authors: “...Chau-Chin Su...”
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  2. 2
    Frequency Response Measurement Using on-Chip ADC
    by Fu, Weng-Chen, 傅偉宸
    Published 1998
    Other Authors: “...Chau-Chin Su...”
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  3. 3
    High-Speed Interface Pin Electronics Circuit Design
    by Yen-Cheng Tsai, 蔡彥呈
    Published 2004
    Other Authors: “...Chau-Chin Su...”
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  4. 4
    A 10-Gb/s CMOS Clock and Data Recovery Circuit with Data-Deskew Buffers in the Closed Loop
    by Chung Chieh Yang, 楊忠傑
    Published 2007
    Other Authors: “...Chau Chin Su...”
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  5. 5
    5-Gb/s Low Power On-Chip Pulse Signaling Interface
    by Ying-Lin Fang, 方盈霖
    Published 2007
    Other Authors: “...Chau Chin Su...”
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  6. 6
    High Speed Serial Link for Inter-Chip Communication
    by Bo-Shen Yu, 喻柏莘
    Published 2002
    Other Authors: “...Chau-Chin Su...”
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  7. 7
    Multi-module synchronization methodology
    by Shi-Dai Mai, 麥世達
    Published 2002
    Other Authors: “...Chau-Chin Su...”
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  8. 8
    A Self Calibrated ADC BIST Methodology
    by Hung-Kai Chen, 陳鴻愷
    Published 2002
    Other Authors: “...Chau-Chin Su...”
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  9. 9
    A Bus Circuit Design with Dynamic Voltage/Frequency Scaling and Repeater Insertion
    by Ya Ting Chen, 陳雅婷
    Published 2008
    Other Authors: “...Chau Chin Su...”
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  10. 10
    A 0.8-V Low Power Analog Front-End IC for Biomedical Signal Recording
    by Shuo-Ting Kao, 高碩廷
    Published 2008
    Other Authors: “...Chau-Chin Su...”
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  11. 11
    A Built-in Technique for Measuring Substrate Noise
    by Ting-Yi Lin, 林挺毅
    Published 2008
    Other Authors: “...Chau-Chin Su...”
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  12. 12
    High Speed Serial Link Built-in Self Test Circuit Design
    by JuMin Shih, 史汝敏
    Published 2008
    Other Authors: “...ChauChin Su...”
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  13. 13
    Built-in Self-test Circuit for Pipelined Analog to Digital Converter
    by ChingLin Jang, 任慶霖
    Published 2008
    Other Authors: “...ChauChin Su...”
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  14. 14
    Carrier-Grade IGMP Proxy Server for ATCA-based Access Equipment
    by Ping-Hai Hsu, 徐彬海
    Published 2008
    Other Authors: “...Chau-Chin Su...”
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  15. 15
    Analysis and Simulation of High-Speed Interconnects Using Moment-Matching Technique
    by Son-Fu Yeh, 葉尚府
    Published 2003
    Other Authors: “...Chau-Chin Su...”
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  16. 16
    A 1.25-GHz, 8-phase phase-locked loop with low gain and wide tuning range VCO
    by Jen-Chien Hsu, 徐仁乾
    Published 2003
    Other Authors: “...Chau-Chin Su...”
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  17. 17
    A 2.5V, 0.35um, 2.5Gbps transceiver design
    by Shao-Ming Chang, 張紹銘
    Published 2001
    Other Authors: “...Chau-Chin Su...”
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  18. 18
    High Precision and Low Cost Voltage Metrology
    by Wei-Juo Wang, 王偉州
    Published 2001
    Other Authors: “...Chau-Chin Su...”
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  19. 19
    multiple module synchronization methodology
    by Chia-Hsiang Chang, 張家祥
    Published 2001
    Other Authors: “...Chau-Chin Su...”
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  20. 20
    DSP Library for SOC ADC Testing
    by Yi-Horng Lin, 林宜宏
    Published 2001
    Other Authors: “...Chau-Chin Su...”
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