Showing 1 - 20 results of 64 for search 'Chung-Len Lee', query time: 0.06s Refine Results
  1. 1
    A New BIST Scheme for Digital-to-Analog Converters
    by Guan-Xun Chen, 陳冠勳
    Published 2002
    Other Authors: “...Chung-Len Lee...”
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  2. 2
    A DFT Scheme for PLL Fault Diagnosis
    by Ching Hsiang Yang, 楊景翔
    Published 2002
    Other Authors: “...Chung Len Lee...”
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  3. 3
    IEEE Std. 1149.4 Compatible Analog BIST Methodology
    by Te-Sung, Tu, 涂德松
    Published 2004
    Other Authors: “...Chung-Len, Lee...”
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  4. 4
    Dynamic Analog Testing via ATE Digital Test Channels
    by Chi-Shih Chang, 章即時
    Published 2004
    Other Authors: “...Chung-Len Lee...”
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  5. 5
    A Case Study on DFT and BIST Design for a Wired Equivalent Privacy IP
    by Lung-Yu Lin, 林隆裕
    Published 2004
    Other Authors: “...Chung-Len Lee...”
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  6. 6
    TFT LCD Source Driver IC Testing-Fault Models and Test Generation
    by chui-shun chiu, 邱垂勳
    Published 2002
    Other Authors: “...Chung Len Lee...”
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  7. 7
    IDDQ Testing on Memories
    by Kun-Ti Lee, 李坤地
    Published 1999
    Other Authors: “...Chung Len Lee...”
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  8. 8
    Argon implantation and MeV proton bombardment for ULSI Applications
    by Lurng Shehng Lee, 李隆盛
    Published 2000
    Other Authors: “...Chung Len Lee...”
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  9. 9
    Coupling Fault Detection using Socillator Test in Digital Circuits
    by Chi Peng Chang, 張志鵬
    Published 2000
    Other Authors: “...Chung Len Lee...”
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  10. 10
    Jitter Analysis Due to Noise in the Phase-Locked Loop Circuits
    by Ching-Tsan Lee, 李敬贊
    Published 2000
    Other Authors: “...Chung-Len Lee...”
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  11. 11
    A Delay Fault Test Scheme Based on Socillator Test In Boundary-Scan Environment
    by Tek-Jau Tan, 陳德昭
    Published 2000
    Other Authors: “...Chung-Len Lee...”
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  12. 12
    The Study of Rapid Thermal N2O Annealing for Polysilicon oxides and Thin-Film Transistors
    by Kao Chyuan-Haur, 高泉豪
    Published 1998
    Other Authors: “...Chung-Len Lee...”
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  13. 13
    Delay Testing and Fault Simulation for Digital Circuits
    by Wu, Wen Ching, 吳文慶
    Published 1997
    Other Authors: “...Chung Len Lee...”
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  14. 14
    Realization of a Parallel-Pattern Parallel-Fault Fault Simulation Accelerator for Synchronous Sequential Circuits
    by Lee, Ten_Hwang, 李增煌
    Published 1997
    Other Authors: “...Chung-Len Lee...”
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  15. 15
    Testing and Improving Testability for Synchronous Sequential Circuits
    by Liang, Hsing-Chung, 梁新聰
    Published 1997
    Other Authors: “...Chung Len Lee...”
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  16. 16
    The Study of Low temperature Oxides and Vertical Polysilicon Thin-Film Transistors
    by Ming-Zhen Lee, 李名鎮
    Published 2003
    Other Authors: “...Chung Len Lee...”
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  17. 17
    A Vernier Sampling for Periodic Signal and Speed-Up DFT Computation Method for Mixed Siganl Testing
    by Ming-Ho Chen, 陳明和
    Published 2003
    Other Authors: “...Chung-Len Lee...”
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  18. 18
    High-K Gate Dielectrics and Interpoly Oxynitride Dielectrics Prepared with Post-Deposition Plasma Treatment
    by Jer Chyi Wang, 王哲麒
    Published 2003
    Other Authors: “...Chung Len Lee...”
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  19. 19
    Analysis and Implementation of a Highly Linear Voltage-Controlled Oscillator Circuit
    by Chia Hao Yang, 楊家豪
    Published 2002
    Other Authors: “...Chung Len Lee...”
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  20. 20
    Fault Diagnosis for Analog and Mixed Signal Circuits
    by Jun Weir Lin, 林俊偉
    Published 2002
    Other Authors: “...Chung Len Lee...”
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