Showing 1 - 18 results of 18 for search 'Jung-Lin Yang', query time: 0.11s Refine Results
  1. 1
    Designing Self-timed Adders Using Low Power/Cost Differential Logic
    Other Authors: “...Jung-Lin YANG...”
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  2. 2
    Home Safety Mutual-Aid System
    by Hung-Yu Lin, 林宏煜
    Published 102
    Other Authors: “...Jung-Lin YANG...”
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  3. 3
    Digitally Programmable Delay Element for Asynchronous SOC Design
    by Chih-Wei Chao, 趙智偉
    Published 2007
    Other Authors: “...Jung-Lin Yang...”
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  4. 4
    A 64 Bit Asynchronous Low Power Consumption Comparator
    by Chen-Chia Yang, 楊振加
    Published 2007
    Other Authors: “...Jung-Lin Yang...”
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  5. 5
    Fast Transition Probability Analysis for VLSI and Communication Applications
    by Chi-Che Hsieh, 謝其哲
    Published 2007
    Other Authors: “...Jung-Lin Yang...”
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  6. 6
    High-Level Synthesis for Self-Timed System
    by Hsu-Ching Tien, 田旭清
    Published 2006
    Other Authors: “...Jung-Lin Yang...”
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  7. 7
    Improved Technique on Parallelism for Asynchronous Controllers
    by Chih-Feng Tai, 戴志峰
    Published 2007
    Other Authors: “...Jung-Lin Yang...”
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  8. 8
    Automatic Layout Generator for Low Power Asynchronous Circuits
    by Yu-Wen,Su, 蘇郁文
    Published 100
    Other Authors: “...Jung-Lin,yang...”
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  9. 9
    Performance and Robustness Analysis for 64-bit Self-timed Comparators
    by Yi-Te Chou, 周易德
    Published 2010
    Other Authors: “...Jung-Lin Yang...”
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  10. 10
    Performance Analysis and Function Validation of Control Signal Reshuffling Technique
    by Po-Chen Chen, 陳柏辰
    Published 2010
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  11. 11
    Reliability analysis of state transition weight approximation technique
    by Chin-Sheng Kan, 甘金生
    Published 2010
    Other Authors: “...Jung-Lin Yang...”
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  12. 12
    HDLs Modeling Technique for Burst-Mode and Extended Burst-Mode Asynchronous Circuits
    by Jau-Cheng Wei, 魏兆成
    Published 2010
    Other Authors: “...Jung-Lin Yang...”
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  13. 13
    Comprehensive Study of Signal Ordering Impacts on Digital Circuits
    by An-Tai Tsai, 蔡安泰
    Published 2010
    Other Authors: “...Jung-Lin Yang...”
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  14. 14
    Pseudo-DCVSL Architecture for Low-Power CMOS Digital Circuits Design
    by Chao-Wei Huang, 黃昭維
    Published 2008
    Other Authors: “...Jung-Lin Yang...”
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  15. 15
    Asynchronous Circuits Testing Platform
    by Wei-Che Hsu, 許維哲
    Published 2008
    Other Authors: “...Jung-Lin Yang...”
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  16. 16
    Programmable Asynchronous Circuits
    by Wen-Yueh Lai, 賴玟嶽
    Published 2005
    Other Authors: “...Jung-Lin Yang...”
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  17. 17
    A Platform for High-Level Synthesis and Post-Simulation of Self-Timed Systems
    by Sung-Min Lin, 林嵩閔
    Published 2006
    Other Authors: “...Jung-Lin Yang...”
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  18. 18
    Tiny Self-timed Microprocessor: A Case Study of FPGA-based Asynchronous Circuit Design
    by Shin-Nung Lu, 盧欣農
    Published 2010
    Other Authors: “...Jung-Lin Yang...”
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