Showing 1 - 15 results of 15 for search 'LAI, FEI-PI', query time: 0.08s Refine Results
  1. 1
    A design of memory management unit and cache controller for the MARS system
    by MA, JING-HUA, 馬靖華
    Published 1992
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  2. 2
    MARS performance evaluation with different interconnection networks
    by ZENG, LI-MING, 曾立明
    Published 1989
    Other Authors: “...LAI, FEI-PI...”
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  3. 3
    兼具符號與數值處理能力之多處理機系統中，整數處理單元之設計
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  4. 4
    The design of list processing unit (LPU) for the MARS system
    by CAI, ZHEN-YUAN, 蔡震原
    Published 1989
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  5. 5
    延時分析之演算法
    by LU, SHUN-XING, 呂舜星
    Published 1989
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  6. 6
    Iterative array testing in VLSI
    by ZENGM FAN-HUA, 曾繁華
    Published 1989
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  7. 7
    閘矩陣佈局的群吞發式演算法
    by LIU, ZHONG-PING, 劉仲平
    Published 1989
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  8. 8
    A gate-level rule-based expert system optimization with resizing and testability enhancement
    by WANG, JIAN-SHENG, 王健聲
    Published 1989
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  9. 9
    ARES-architecture REinforcing superscalar
    by LIN,YU-HAO, 林育豪
    Published 1991
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  10. 10
    The algorithm and implementation of register allocation using dynamic information
    by YE,JIA-CHENG, 葉家誠
    Published 1991
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  11. 11
    指令集重組器的設計與實做
    by LI,JUN-LU, 李俊祿
    Published 1990
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  12. 12
    記憶體管理單元與快取記憶體控制器之設計與實作
    Other Authors: “...LAI,FEI-PI...”
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  13. 13
    The design and implementation of list processing unit (LPU) of the MARS system
    by CHEN,KUN-ZHOU, 陳坤洲
    Published 1990
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  14. 14
    The design and implementation of Integer Processing Unit (IPU) of the MARS system
    by HONG,CHUN-JING, 洪春敬
    Published 1990
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  15. 15
    Bipartition and Synthesis in Low Power Pipelined Circuits
    by Huang, Xian-Jun, 黃咸鈞
    Published 1997
    Other Authors: “...Lai, Fei-Pi...”
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