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Prof. Shyh-jye Jou
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Prof. Shyh-jye Jou
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Prof. Shyh-jye Jou
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1
Power/Timing Analysis of ECL and MOS VLSI Circuits
by
Jyh Haur Pan
,
潘志豪
Published 1995
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Prof
.
Shyh
-
Jye
Jou
...
”
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2
FPGA-Based Reconfigurable Prototyping System for Communication
by
Shang-jye Wen
,
溫上杰
Published 1996
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Prof
.
Shyh
-
jye
Jou
...
”
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3
The Self-Timed Circuits and Its Low Power Applications
by
Yi-Yaou Chuang
,
莊逸堯
Published 1996
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Prof
.
Shyh
-
Jye
Jou
...
”
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4
Adiabatic Logic Circuit Design and Low Power Infrared Transceiver ta Communication
by
Chi-Chung Huang
,
黃繼樟
Published 1996
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Prof
.
Shyh
-
Jye
Jou
...
”
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5
All Digital Phase-Locked Loop
by
Ya-lan Tsao
,
曹亞嵐
Published 1996
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Prof
.
Shyh
-
jye
Jou
...
”
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6
Low-Voltag Low-Power Circuit and ARchitecture Designs for CMOS Receiver Front End
by
Kuang-Hu Huang
,
黃光虎
Published 1999
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Prof
.
Shyh
-
Jye
Jou
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7
Circuit Simulation Speedup Techniques on Distributed Computing Environment
by
Wen-Hsing Hsieh
,
謝文興
Published 1996
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Prof
.
Shyh
-
Jye
Jou
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”
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8
Macromodeling Methodologyand Model Reduction for Electrical Circuit Transfer Function
by
Chun-Shan Hsu
,
徐鈞山
Published 1995
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Prof
.
Shyh
-
Jye
Jou
...
”
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9
Numerical Control Oscillator Using TSPC
by
En-Chung Yang
,
楊衍中
Published 1995
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Prof
.
Shyh
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Jye
Jou
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”
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