Showing 1 - 20 results of 52 for search 'Sying-Jyan Wang', query time: 0.24s Refine Results
  1. 1
    Machine Learning Assisted Reliability Enhancement Methodology for Strong PUFs
    by Tzu-Heng Chang, 張慈恆
    Published 2019
    Other Authors: “...Sying-Jyan Wang...”
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  2. 2
    Adversarial Attack against Modeling Attack on PUFs
    by Yu-Sheng Chen, 陳育聖
    Published 2019
    Other Authors: “...Sying-Jyan Wang...”
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  3. 3
    A Register-PUF Design without Power-Up Requirement
    by Chin-Hung Lien, 練智弘
    Published 2017
    Other Authors: “...Sying-Jyan Wang...”
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  4. 4
    Information Leakage with Phony BUS Signal
    by Ying-Yan Li, 李應延
    Published 2018
    Other Authors: “...Sying-Jyan Wang...”
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  5. 5
    Robust PUF Design
    by Yan-Lin Chen, 陳彥霖
    Published 2018
    Other Authors: “...Sying-Jyan Wang...”
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  6. 6
    Analysis and reduction of candidate locations for Hardware Trojans
    by Guan-Ling Chen, 陳冠伶
    Published 2018
    Other Authors: “...Sying-Jyan Wang...”
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  7. 7
    A Study on Sequential Hardware Trojans Detection
    by Yuan-Heng Chang, 張源亨
    Published 2019
    Other Authors: “...Sying-Jyan Wang...”
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  8. 8
    Diagnosis and Fault Tolerance of Paper-Based Microfluidic Biochips
    by Jain-De Li, 李建德
    Published 2016
    Other Authors: “...Sying-Jyan Wang...”
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  9. 9
    Test Data and Test Time Reduction for LOS Transition Test in Multi-Mode Segmented Scan Architecture
    by Hung-Ming Weng, 翁宏銘
    Published 2007
    Other Authors: “...Sying-Jyan Wang...”
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  10. 10
    Design and Analysis of Efficient Scan Chain Architecture for Improving Code-Based Test Data Compression
    by Shih-Cheng Chen, 陳世政
    Published 2007
    Other Authors: “...Sying-Jyan Wang...”
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  11. 11
    Multi-Goal Optimization of Scan Chain Ordering on Skew-Load Transition Test
    by Kuang-Cyun Siao, 蕭匡宭
    Published 2007
    Other Authors: “...Sying-Jyan Wang...”
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  12. 12
    Generating Efficient Tests for Continuous Scan
    Other Authors: “...Sying-Jyan Wang...”
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  13. 13
    Built-In Self-Repair Design
    by Juang Shuenn-Ru, 莊舜如
    Published 2000
    Other Authors: “...Sying-Jyan Wang...”
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  14. 14
    By Modifying Behavioral Description To Improve Testability Prbolem Caused By Conditional Statement
    by Yang, Chung Jen, 楊中仁
    Published 1998
    Other Authors: “...Sying Jyan Wang...”
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  15. 15
    Modifying User-Defined Logic for Testing Embedded Core
    by Wang, Hung-ju, 王弘儒
    Published 1998
    Other Authors: “...Sying-Jyan Wang...”
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  16. 16
    Test and Diagnosis of Interconnect in FPGAs
    by Huang, Chao-Neng, 黃照能
    Published 1998
    Other Authors: “...Sying-Jyan Wang...”
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  17. 17
    Programmable SOC Test Controller
    by Chih Hao Wang, 王志浩
    Published 2005
    Other Authors: “...Sying Jyan Wang...”
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  18. 18
    High Level Synthesis with Buffer Insertion
    by Feng Ming Chang, 張峰銘
    Published 2006
    Other Authors: “...Sying Jyan Wang...”
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  19. 19
    Test and Diagnosis of Faulty Logic Blocks in FPGA
    by Tsai, Ti-Ming, 蔡志銘
    Published 1997
    Other Authors: “...Sying-Jyan Wang...”
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  20. 20
    Analyzation and Testing of Interconnection Faults in Microprocessor-Based System
    by Chen-Haw, Ko, 柯健華
    Published 1997
    Other Authors: “...Sying-Jyan Wang...”
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