Showing 1 - 20 results of 27 for search 'WANG JINN-SHYAN', query time: 0.28s Refine Results
  1. 1
    A New Dual-Split-Control-Assist 6T SRAM with Improved Vmin and Access Speed
    by WANG, HAO-PING, 王皓平
    Published 2019
    Other Authors: “...WANG, JINN-SHYAN...”
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  2. 2
    Analysis and Design of Near-Threshold Dynamic Circuits for Low-Energy Designs
    by FANG, YA-BEI, 方雅蓓
    Published 2019
    Other Authors: “...WANG, JINN-SHYAN...”
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  3. 3
    Digital thermal monitor on FPGA in Nano-meter CMOS technology
    by Liang, Ting-Chang, 梁庭彰
    Published 2019
    Other Authors: “...Wang, Jinn-Shyan...”
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  4. 4
    Improved Adaptive voltage scaling control loop for energy-efficient Deep Neural Network
    by Wang,Ren-Sian, 王人賢
    Published 2019
    Other Authors: “...Wang,Jinn-Shyan...”
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  5. 5
    Design of High Resolution, Low Measured Jitter Errorand Variation Resilient On-Chip Jitter Sensor for DDR4-3200
    by CHIANG, HU-CHENG, 江虎城
    Published 2018
    Other Authors: “...WANG JINN-SHYAN...”
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  6. 6
    Variation-Resilient Key Circuits Design for Timing Error Prediction and Local Boost(TEP-LB) Technique
    by HUANG, CHANG-LAN, 黃正嵐
    Published 2018
    Other Authors: “...WANG, JINN-SHYAN...”
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  7. 7
    Design of Near- and Sub-Threshold SRAMs
    by CHIEN, YUNG-CHEN, 簡永溱
    Published 2017
    Other Authors: “...WANG, JINN-SHYAN...”
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  8. 8
    Design and Analysis of 40nm 10T Differential Sub-threshold Bit-Interleaved SRAM
    by LIN,YI-SIAN, 林逸賢
    Published 2017
    Other Authors: “...WANG,JINN-SHYAN...”
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  9. 9
    Design of Ultra-Low-Leakage AOI- and OAI-type Subthreshold Read Only Memories
    by XUE, CHENG-XIN, 薛承昕
    Published 2017
    Other Authors: “...WANG, JINN-SHYAN...”
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  10. 10
    Design of Variation Resilient Clocked Elements for Pipelined Systems
    by WEI, SHIH-NUNG, 魏仕穠
    Published 2017
    Other Authors: “...WANG, JINN-SHYAN...”
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  11. 11
    28nm Low Voltage 6T SRAM with Lower Power Consumption Assist Circuit Design
    by LIU, ZHI RONG, 劉知融
    Published 2017
    Other Authors: “...WANG, JINN-SHYAN...”
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  12. 12
    Design of Low Energy Near-Threshold Dynamic Adder and CORDIC for IoT Applications
    by CHEN, BO-HAO, 陳柏豪
    Published 2017
    Other Authors: “...WANG, JINN-SHYAN...”
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  13. 13
    SNM-Aware Subthreshold SRAM Cell and Array Designs
    by WENG, WEI-JIA, 翁偉嘉
    Published 2017
    Other Authors: “...WANG, JINN-SHYAN...”
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  14. 14
    Design of ADPCM & CRC Codecs in PACS ASIC with Technology Migration
    by Huang Chao-Sheng, 黃超聖
    Published 2000
    Other Authors: “...Wang Jinn-Shyan...”
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  15. 15
    Low-Power Cell-Based VLSI Design Using Cell Replacement Techniques
    by Wang, Jei-Chien, 王瑞乾
    Published 1997
    Other Authors: “...Wang Jinn-Shyan...”
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  16. 16
    Design and analysis of sense amplifiers for sub-threshold Static Random Access Memories
    by Chen, Chun-Heng, 陳鈞恒
    Published 2011
    Other Authors: “...Wang, Jinn-Shyan...”
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  17. 17
    Multi-Channel-Length Sub-Threshold CMOS Circuits
    by Hsieh, Chung-Han, 謝宗翰
    Published 2011
    Other Authors: “...Wang, Jinn-Shyan...”
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  18. 18
    A 16kb 10T 90nm Sub-Threshold SRAM
    by Huang Wen-Hung, 黃文宏
    Published 2011
    Other Authors: “...Wang, Jinn-Shyan...”
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  19. 19
    Biospectroscopic Characterization of Thromboxane and Prostacyclin Synthases
    by Chao, Wei-Chih, 趙偉志
    Published 2011
    Other Authors: “...Wang, Jinn-Shyan...”
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  20. 20
    Low-Power All-Digital Delay-Locked Loop for Nano-CMOS SoC Applications
    by Cheng, Chun-Yuan, 鄭竣元
    Published 2012
    Other Authors: “...Wang, Jinn-Shyan...”
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