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Wai-Kei Mak
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Wai-Kei Mak
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Wai-Kei Mak
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1
Multi-Project Wafer Floorplanning and Dicing
by
Chien-Chang Chen
,
陳建璋
Published 2005
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Wai
-
Kei
Mak
...
”
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2
Simultaneous Supply and Threshold Voltage Assignment with Gate Sizing for Low Power
by
Chih-Feng Chang
,
張誌峰
Published 2007
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Wai
-
Kei
Mak
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3
Buffer Insertion for ASIC and FPGA Designs
by
Yi-Ru He
,
何宜儒
Published 2007
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Wai
-
Kei
Mak
...
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4
覆晶式設計下考量輸入輸出訊號歪斜的平面規劃及分派接合點之方法
by
Cheng-Yu Wang
,
王振宇
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Wai
-
Kei
Mak
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5
迷宮繞線與在迴轉率及障礙物限制下作最小成本之緩衝器嵌入
by
Seong-I Lei
,
李尚貽
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Wai
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Kei
Mak
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6
Voltage Island Floorplanning for SoC design with Multiple Supply Voltages
by
Jr-Wei Chen
,
陳志維
Published 2006
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Wai
-
Kei
Mak
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7
λ-Geometry Clock Tree Construction with Wirelength and Via Minimization
by
Chun-Hao Wang
,
王君浩
Published 2006
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Wai
-
Kei
Mak
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”
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8
Congestion Aware Buffer Insertion with Re-routing
by
Zhi-Hao Haung
,
黃致豪
Published 2006
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Wai
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Kei
Mak
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9
Industrial FPGA I/O Placement
by
Chun-Lun Lai
,
賴均綸
Published 2005
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Wai
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Kei
Mak
...
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10
Zero Skew Gated Clock Network Construction with Flexible Buffer Insertion
by
Wei-Chung Chao
,
趙偉仲
Published 2006
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Wai
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Kei
Mak
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