HW/SW Co-Design for Dates Classification on Xilinx Zynq SoC

This paper proposes HW/SW Co-design of an automatic classification system of Khalas, Khunaizi, Fardh, Qash, Naghal, and Maan dates fruit varieties in Oman. The system implements pre-processing, segmentation of the colored input images, color and shape-size features extraction followed by ANN-tansig...

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Main Authors: Ahmed Chiheb Ammari, Lazhar Khriji, Medhat Awadalla
Format: Article
Language:English
Published: FRUCT 2020-04-01
Series:Proceedings of the XXth Conference of Open Innovations Association FRUCT
Subjects:
Online Access:https://www.fruct.org/publications/fruct26/files/Amm.pdf
id doaj-0709942f978c42a09b097de2e8d5fa81
record_format Article
spelling doaj-0709942f978c42a09b097de2e8d5fa812020-11-25T03:42:09ZengFRUCTProceedings of the XXth Conference of Open Innovations Association FRUCT2305-72542343-07372020-04-01261101510.23919/FRUCT48808.2020.9087548HW/SW Co-Design for Dates Classification on Xilinx Zynq SoCAhmed Chiheb Ammari0Lazhar Khriji1Medhat Awadalla2Sultan Qaboos University, OmanSultan Qaboos University, OmanSultan Qaboos University, OmanThis paper proposes HW/SW Co-design of an automatic classification system of Khalas, Khunaizi, Fardh, Qash, Naghal, and Maan dates fruit varieties in Oman. The system implements pre-processing, segmentation of the colored input images, color and shape-size features extraction followed by ANN-tansig classification. The performance of the proposed system is experimented and 97.26% highest classification accuracy are achieved. The proposed system is prototyped using a selected Zynq 7020 SoC platform featuring, on the same chip, a dual-core ARM Cortex A9 processing System (PS) interconnected with FPGA logic (PL) though high-throughput communication channels. The original classification algorithm is profiled and then a HW/SW Co-design is developed achieving 10.9 fps real time classification performance. This performance is acceptable and represents almost 14 times speedup acceleration comparatively to the original program implementation.https://www.fruct.org/publications/fruct26/files/Amm.pdfartificial neural networkcolor and shape-size featureszynq sochw/sw co-design
collection DOAJ
language English
format Article
sources DOAJ
author Ahmed Chiheb Ammari
Lazhar Khriji
Medhat Awadalla
spellingShingle Ahmed Chiheb Ammari
Lazhar Khriji
Medhat Awadalla
HW/SW Co-Design for Dates Classification on Xilinx Zynq SoC
Proceedings of the XXth Conference of Open Innovations Association FRUCT
artificial neural network
color and shape-size features
zynq soc
hw/sw co-design
author_facet Ahmed Chiheb Ammari
Lazhar Khriji
Medhat Awadalla
author_sort Ahmed Chiheb Ammari
title HW/SW Co-Design for Dates Classification on Xilinx Zynq SoC
title_short HW/SW Co-Design for Dates Classification on Xilinx Zynq SoC
title_full HW/SW Co-Design for Dates Classification on Xilinx Zynq SoC
title_fullStr HW/SW Co-Design for Dates Classification on Xilinx Zynq SoC
title_full_unstemmed HW/SW Co-Design for Dates Classification on Xilinx Zynq SoC
title_sort hw/sw co-design for dates classification on xilinx zynq soc
publisher FRUCT
series Proceedings of the XXth Conference of Open Innovations Association FRUCT
issn 2305-7254
2343-0737
publishDate 2020-04-01
description This paper proposes HW/SW Co-design of an automatic classification system of Khalas, Khunaizi, Fardh, Qash, Naghal, and Maan dates fruit varieties in Oman. The system implements pre-processing, segmentation of the colored input images, color and shape-size features extraction followed by ANN-tansig classification. The performance of the proposed system is experimented and 97.26% highest classification accuracy are achieved. The proposed system is prototyped using a selected Zynq 7020 SoC platform featuring, on the same chip, a dual-core ARM Cortex A9 processing System (PS) interconnected with FPGA logic (PL) though high-throughput communication channels. The original classification algorithm is profiled and then a HW/SW Co-design is developed achieving 10.9 fps real time classification performance. This performance is acceptable and represents almost 14 times speedup acceleration comparatively to the original program implementation.
topic artificial neural network
color and shape-size features
zynq soc
hw/sw co-design
url https://www.fruct.org/publications/fruct26/files/Amm.pdf
work_keys_str_mv AT ahmedchihebammari hwswcodesignfordatesclassificationonxilinxzynqsoc
AT lazharkhriji hwswcodesignfordatesclassificationonxilinxzynqsoc
AT medhatawadalla hwswcodesignfordatesclassificationonxilinxzynqsoc
_version_ 1724526921388130304