Fast Longest Prefix Matching by Exploiting SIMD Instructions

Longest prefix matching (LPM) is a fundamental process in IP routing used not only in traditional hardware routers but also in software middleboxes. However, the performance of LPM in software is still insufficient for processing packets at over 100 Gbps, although previous studies have tackled this...

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Main Authors: Yukito Ueno, Ryo Nakamura, Yohei Kuga, Hiroshi Esaki
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/9194243/
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spelling doaj-0ac144ad95cc4980a4f7b6cd162d9a542021-03-30T03:27:21ZengIEEEIEEE Access2169-35362020-01-01816702716704110.1109/ACCESS.2020.30231569194243Fast Longest Prefix Matching by Exploiting SIMD InstructionsYukito Ueno0https://orcid.org/0000-0002-4119-0678Ryo Nakamura1Yohei Kuga2Hiroshi Esaki3Graduate School of Information Science and Technology, The University of Tokyo, Tokyo, JapanInformation Technology Center, The University of Tokyo, Tokyo, JapanInformation Technology Center, The University of Tokyo, Tokyo, JapanGraduate School of Information Science and Technology, The University of Tokyo, Tokyo, JapanLongest prefix matching (LPM) is a fundamental process in IP routing used not only in traditional hardware routers but also in software middleboxes. However, the performance of LPM in software is still insufficient for processing packets at over 100 Gbps, although previous studies have tackled this issue by exploiting the CPU cache or accelerators such as GPUs. To improve the performance of software LPM further, we propose a novel LPM method called Spider, which exploits a single-instruction multiple-data (SIMD) mechanism in the CPU. Spider achieves performing LPM for up to 16 destination IP address in parallel by a routing table structure carefully designed for processing by the SIMD instructions. We evaluated Spider from the following three perspectives: the improvement of LPM performance derived from the parallelism provided by the SIMD mechanism, performance comparison with other methods, and performance scalability. The evaluation shows that Spider dramatically improves the LPM performance, which reaches 1.8-3.2 times compared with the state-of-the-art methods. Moreover, Spider achieves 5,074 million lookups per second with 16 CPU cores, which is equivalent to the processing capacity of 3.4 Tbps in short packets; the performance opens up the possibility of packet processing at the terabit-class rate by software.https://ieeexplore.ieee.org/document/9194243/IP routinglongest prefix matching (LPM)single-instruction multiple-data (SIMD)software middlebox
collection DOAJ
language English
format Article
sources DOAJ
author Yukito Ueno
Ryo Nakamura
Yohei Kuga
Hiroshi Esaki
spellingShingle Yukito Ueno
Ryo Nakamura
Yohei Kuga
Hiroshi Esaki
Fast Longest Prefix Matching by Exploiting SIMD Instructions
IEEE Access
IP routing
longest prefix matching (LPM)
single-instruction multiple-data (SIMD)
software middlebox
author_facet Yukito Ueno
Ryo Nakamura
Yohei Kuga
Hiroshi Esaki
author_sort Yukito Ueno
title Fast Longest Prefix Matching by Exploiting SIMD Instructions
title_short Fast Longest Prefix Matching by Exploiting SIMD Instructions
title_full Fast Longest Prefix Matching by Exploiting SIMD Instructions
title_fullStr Fast Longest Prefix Matching by Exploiting SIMD Instructions
title_full_unstemmed Fast Longest Prefix Matching by Exploiting SIMD Instructions
title_sort fast longest prefix matching by exploiting simd instructions
publisher IEEE
series IEEE Access
issn 2169-3536
publishDate 2020-01-01
description Longest prefix matching (LPM) is a fundamental process in IP routing used not only in traditional hardware routers but also in software middleboxes. However, the performance of LPM in software is still insufficient for processing packets at over 100 Gbps, although previous studies have tackled this issue by exploiting the CPU cache or accelerators such as GPUs. To improve the performance of software LPM further, we propose a novel LPM method called Spider, which exploits a single-instruction multiple-data (SIMD) mechanism in the CPU. Spider achieves performing LPM for up to 16 destination IP address in parallel by a routing table structure carefully designed for processing by the SIMD instructions. We evaluated Spider from the following three perspectives: the improvement of LPM performance derived from the parallelism provided by the SIMD mechanism, performance comparison with other methods, and performance scalability. The evaluation shows that Spider dramatically improves the LPM performance, which reaches 1.8-3.2 times compared with the state-of-the-art methods. Moreover, Spider achieves 5,074 million lookups per second with 16 CPU cores, which is equivalent to the processing capacity of 3.4 Tbps in short packets; the performance opens up the possibility of packet processing at the terabit-class rate by software.
topic IP routing
longest prefix matching (LPM)
single-instruction multiple-data (SIMD)
software middlebox
url https://ieeexplore.ieee.org/document/9194243/
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AT hiroshiesaki fastlongestprefixmatchingbyexploitingsimdinstructions
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