Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM V<sub>MIN</sub>
The need for ultra low power circuits has forced circuit designers to scale voltage supplies into the sub-threshold region where energy per operation is minimized [1]. The problem with this is that the traditional 6T SRAM bitcell, used for data storage, becomes unreliable at voltages below about 700...
Main Authors: | , , |
---|---|
Format: | Article |
Language: | English |
Published: |
MDPI AG
2012-04-01
|
Series: | Journal of Low Power Electronics and Applications |
Subjects: | |
Online Access: | http://www.mdpi.com/2079-9268/2/2/143 |