Design and Realization of FIR Filter for Inter Satellite Link at 50-90 MHZ Frequency using FPGA

Design and Realization of FIR Filter for Inter Satellite Link at 50-90 MHZ Frequency using FPGA

In this paper, design and realization of FIR filter with a bandwidth of 40 MHz at 50-90 MHz frequency has been proposed. The design was destined to be implemented on the Inter Satellite Links (ISL). This kind of filter had been selected due to a need in linear phase responseon the ISL data communica...

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Bibliographic Details
Main Authors: Yuyu Wahyu, Ken Paramayudha, Lutfi Jamil Setiawan, Heroe Wijanto, M. Shiddiq S.H
Format: Article
Language:English
Published: Indonesian Institute of Sciences 2016-12-01
Series:Jurnal Elektronika dan Telekomunikasi
Subjects:
FIR filter
equiripple
FPGA
VHDL
Online Access:http://www.jurnalet.com/jet/article/view/110

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