Performance analysis of multi-rate signal processing digital filters on FPGA
Abstract Multi-rate signal processing, an important part of the design of a digital frequency converter, is realized mainly based on interpolation and decimation, which match the sampling rate between the baseband and high-frequency processing side, especially in down conversion. However, the design...
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doaj-1adc6decf49748359e42f0d151be68d72020-11-25T02:27:38ZengSpringerOpenEURASIP Journal on Wireless Communications and Networking1687-14992019-02-01201911910.1186/s13638-019-1349-9Performance analysis of multi-rate signal processing digital filters on FPGAQingfeng Jing0Yujia Li1Jincheng Tong2College of Astronautics, Nanjing University of Aeronautics and AstronauticsCollege of Astronautics, Nanjing University of Aeronautics and AstronauticsInstitute of Telecommunication Satellite, China Academy of Space TechnologyAbstract Multi-rate signal processing, an important part of the design of a digital frequency converter, is realized mainly based on interpolation and decimation, which match the sampling rate between the baseband and high-frequency processing side, especially in down conversion. However, the design of a digital filter is important for realizing multi-rate interpolation and decimation, which is highlighted in this paper. To analyze the digital filter performance in multi-rate signal processing, the ordinary finite impulse response (FIR) filter and more efficient digital filter are discussed respectively. The ordinary FIR filters use a Hamming window to design, while a more efficient digital filter includes a cascaded integrate comb (CIC) and half-band filter. Sampling rate transformation factor is 12 in this design, which is cascaded by three stages. Each stage corresponding to the conversion factor is 3, 2, and 2. Both of these design methods are implemented on the FPGA development board. The hardware resource occupancy and the error rate of the signal amplitude in decimation show that the efficient digital filter is superior to the digital filter designed by the Hamming window in the real-time processing.http://link.springer.com/article/10.1186/s13638-019-1349-9Multi-rate signal processingDecimationHamming window FIR filterCICHalf-band filterFPGA |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Qingfeng Jing Yujia Li Jincheng Tong |
spellingShingle |
Qingfeng Jing Yujia Li Jincheng Tong Performance analysis of multi-rate signal processing digital filters on FPGA EURASIP Journal on Wireless Communications and Networking Multi-rate signal processing Decimation Hamming window FIR filter CIC Half-band filter FPGA |
author_facet |
Qingfeng Jing Yujia Li Jincheng Tong |
author_sort |
Qingfeng Jing |
title |
Performance analysis of multi-rate signal processing digital filters on FPGA |
title_short |
Performance analysis of multi-rate signal processing digital filters on FPGA |
title_full |
Performance analysis of multi-rate signal processing digital filters on FPGA |
title_fullStr |
Performance analysis of multi-rate signal processing digital filters on FPGA |
title_full_unstemmed |
Performance analysis of multi-rate signal processing digital filters on FPGA |
title_sort |
performance analysis of multi-rate signal processing digital filters on fpga |
publisher |
SpringerOpen |
series |
EURASIP Journal on Wireless Communications and Networking |
issn |
1687-1499 |
publishDate |
2019-02-01 |
description |
Abstract Multi-rate signal processing, an important part of the design of a digital frequency converter, is realized mainly based on interpolation and decimation, which match the sampling rate between the baseband and high-frequency processing side, especially in down conversion. However, the design of a digital filter is important for realizing multi-rate interpolation and decimation, which is highlighted in this paper. To analyze the digital filter performance in multi-rate signal processing, the ordinary finite impulse response (FIR) filter and more efficient digital filter are discussed respectively. The ordinary FIR filters use a Hamming window to design, while a more efficient digital filter includes a cascaded integrate comb (CIC) and half-band filter. Sampling rate transformation factor is 12 in this design, which is cascaded by three stages. Each stage corresponding to the conversion factor is 3, 2, and 2. Both of these design methods are implemented on the FPGA development board. The hardware resource occupancy and the error rate of the signal amplitude in decimation show that the efficient digital filter is superior to the digital filter designed by the Hamming window in the real-time processing. |
topic |
Multi-rate signal processing Decimation Hamming window FIR filter CIC Half-band filter FPGA |
url |
http://link.springer.com/article/10.1186/s13638-019-1349-9 |
work_keys_str_mv |
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