An Ultra-Low Power Parity Generator Circuit Based on QCA Technology

Quantum-dot cellular automata (QCA) technology is one of the emerging technologies that can be used for replacing CMOS technology. It has attracted significant attention in the recent years due to its extremely low power dissipation, high operating frequency, and a small size. In this study, we demo...

Full description

Bibliographic Details
Main Authors: Ismail Gassoumi, Lamjed Touil, Bouraoui Ouni, Abdellatif Mtibaa
Format: Article
Language:English
Published: Hindawi Limited 2019-01-01
Series:Journal of Electrical and Computer Engineering
Online Access:http://dx.doi.org/10.1155/2019/1675169
id doaj-21fed87248bc47e398d0c66f67ebb0d4
record_format Article
spelling doaj-21fed87248bc47e398d0c66f67ebb0d42021-07-02T03:28:55ZengHindawi LimitedJournal of Electrical and Computer Engineering2090-01472090-01552019-01-01201910.1155/2019/16751691675169An Ultra-Low Power Parity Generator Circuit Based on QCA TechnologyIsmail Gassoumi0Lamjed Touil1Bouraoui Ouni2Abdellatif Mtibaa3Laboratory of Electronics and Microelectronics, University of Monastir, Monastir, TunisiaLaboratory of Electronics and Microelectronics, University of Monastir, Monastir, TunisiaNetworked Objects Control & Communication Systems Lab, University of Sousse, Sousse, TunisiaLaboratory of Electronics and Microelectronics, University of Monastir, Monastir, TunisiaQuantum-dot cellular automata (QCA) technology is one of the emerging technologies that can be used for replacing CMOS technology. It has attracted significant attention in the recent years due to its extremely low power dissipation, high operating frequency, and a small size. In this study, we demonstrate an n-bit parity generator circuit by utilizing QCA technology. Here, a novel XOR gate is used in the synthesis of the proposed circuit. The proposed gate is based on electrostatic interactions between cells to perform the desired function. The comparison results demonstrate that the designed QCA circuits have advantages compared to other circuits in terms of cell count, area, delay, and power consumption. The QCADesigner software, as widely used QCA circuit design and verification, has been used to implement and to verify all of the designs in this study. Power dissipation has been computed for the proposed circuit using accurate QCAPro power estimator tool.http://dx.doi.org/10.1155/2019/1675169
collection DOAJ
language English
format Article
sources DOAJ
author Ismail Gassoumi
Lamjed Touil
Bouraoui Ouni
Abdellatif Mtibaa
spellingShingle Ismail Gassoumi
Lamjed Touil
Bouraoui Ouni
Abdellatif Mtibaa
An Ultra-Low Power Parity Generator Circuit Based on QCA Technology
Journal of Electrical and Computer Engineering
author_facet Ismail Gassoumi
Lamjed Touil
Bouraoui Ouni
Abdellatif Mtibaa
author_sort Ismail Gassoumi
title An Ultra-Low Power Parity Generator Circuit Based on QCA Technology
title_short An Ultra-Low Power Parity Generator Circuit Based on QCA Technology
title_full An Ultra-Low Power Parity Generator Circuit Based on QCA Technology
title_fullStr An Ultra-Low Power Parity Generator Circuit Based on QCA Technology
title_full_unstemmed An Ultra-Low Power Parity Generator Circuit Based on QCA Technology
title_sort ultra-low power parity generator circuit based on qca technology
publisher Hindawi Limited
series Journal of Electrical and Computer Engineering
issn 2090-0147
2090-0155
publishDate 2019-01-01
description Quantum-dot cellular automata (QCA) technology is one of the emerging technologies that can be used for replacing CMOS technology. It has attracted significant attention in the recent years due to its extremely low power dissipation, high operating frequency, and a small size. In this study, we demonstrate an n-bit parity generator circuit by utilizing QCA technology. Here, a novel XOR gate is used in the synthesis of the proposed circuit. The proposed gate is based on electrostatic interactions between cells to perform the desired function. The comparison results demonstrate that the designed QCA circuits have advantages compared to other circuits in terms of cell count, area, delay, and power consumption. The QCADesigner software, as widely used QCA circuit design and verification, has been used to implement and to verify all of the designs in this study. Power dissipation has been computed for the proposed circuit using accurate QCAPro power estimator tool.
url http://dx.doi.org/10.1155/2019/1675169
work_keys_str_mv AT ismailgassoumi anultralowpowerparitygeneratorcircuitbasedonqcatechnology
AT lamjedtouil anultralowpowerparitygeneratorcircuitbasedonqcatechnology
AT bouraouiouni anultralowpowerparitygeneratorcircuitbasedonqcatechnology
AT abdellatifmtibaa anultralowpowerparitygeneratorcircuitbasedonqcatechnology
AT ismailgassoumi ultralowpowerparitygeneratorcircuitbasedonqcatechnology
AT lamjedtouil ultralowpowerparitygeneratorcircuitbasedonqcatechnology
AT bouraouiouni ultralowpowerparitygeneratorcircuitbasedonqcatechnology
AT abdellatifmtibaa ultralowpowerparitygeneratorcircuitbasedonqcatechnology
_version_ 1721341456902258688