Van der Waals negative capacitance transistors

The adaptation to atomically thin 2D semiconductors and van der Waals layered ferroelectrics can enable negative capacitance transistors with superior performance and bendability. Here, the authors report flexible negative capacitance transistors based on MoS2 and a ferroelectric dielectric CIPS wit...

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Main Authors:	Xiaowei Wang, Peng Yu, Zhendong Lei, Chao Zhu, Xun Cao, Fucai Liu, Lu You, Qingsheng Zeng, Ya Deng, Jiadong Zhou, Qundong Fu, Junling Wang, Yizhong Huang, Zheng Liu
Format:	Article
Language:	English
Published:	Nature Publishing Group 2019-07-01
Series:	Nature Communications
Online Access:	https://doi.org/10.1038/s41467-019-10738-4

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spelling	doaj-2595002f975944a99cba9301ecb5fe732021-05-11T11:47:17ZengNature Publishing GroupNature Communications2041-17232019-07-011011810.1038/s41467-019-10738-4Van der Waals negative capacitance transistorsXiaowei Wang0Peng Yu1Zhendong Lei2Chao Zhu3Xun Cao4Fucai Liu5Lu You6Qingsheng Zeng7Ya Deng8Chao Zhu9Jiadong Zhou10Qundong Fu11Junling Wang12Yizhong Huang13Zheng Liu14School of Materials Science and Engineering, Nanyang Technological UniversitySchool of Materials Science and Engineering, Nanyang Technological UniversityNUS Graduate School for Integrative Sciences & Engineering, National University of SingaporeSchool of Materials Science and Engineering, Nanyang Technological UniversitySchool of Materials Science and Engineering, Nanyang Technological UniversitySchool of Materials Science and Engineering, Nanyang Technological UniversitySchool of Materials Science and Engineering, Nanyang Technological UniversitySchool of Materials Science and Engineering, Nanyang Technological UniversitySchool of Materials Science and Engineering, Nanyang Technological UniversitySchool of Materials Science and Engineering, Nanyang Technological UniversitySchool of Materials Science and Engineering, Nanyang Technological UniversitySchool of Materials Science and Engineering, Nanyang Technological UniversitySchool of Materials Science and Engineering, Nanyang Technological UniversitySchool of Materials Science and Engineering, Nanyang Technological UniversitySchool of Materials Science and Engineering, Nanyang Technological UniversityThe adaptation to atomically thin 2D semiconductors and van der Waals layered ferroelectrics can enable negative capacitance transistors with superior performance and bendability. Here, the authors report flexible negative capacitance transistors based on MoS2 and a ferroelectric dielectric CIPS with a minimum sub-threshold slope of 28 mV/dec and high gain logic invertors.https://doi.org/10.1038/s41467-019-10738-4
collection	DOAJ
language	English
format	Article
sources	DOAJ
author	Xiaowei Wang Peng Yu Zhendong Lei Chao Zhu Xun Cao Fucai Liu Lu You Qingsheng Zeng Ya Deng Chao Zhu Jiadong Zhou Qundong Fu Junling Wang Yizhong Huang Zheng Liu
spellingShingle	Xiaowei Wang Peng Yu Zhendong Lei Chao Zhu Xun Cao Fucai Liu Lu You Qingsheng Zeng Ya Deng Chao Zhu Jiadong Zhou Qundong Fu Junling Wang Yizhong Huang Zheng Liu Van der Waals negative capacitance transistors Nature Communications
author_facet	Xiaowei Wang Peng Yu Zhendong Lei Chao Zhu Xun Cao Fucai Liu Lu You Qingsheng Zeng Ya Deng Chao Zhu Jiadong Zhou Qundong Fu Junling Wang Yizhong Huang Zheng Liu
author_sort	Xiaowei Wang
title	Van der Waals negative capacitance transistors
title_short	Van der Waals negative capacitance transistors
title_full	Van der Waals negative capacitance transistors
title_fullStr	Van der Waals negative capacitance transistors
title_full_unstemmed	Van der Waals negative capacitance transistors
title_sort	van der waals negative capacitance transistors
publisher	Nature Publishing Group
series	Nature Communications
issn	2041-1723
publishDate	2019-07-01
description	The adaptation to atomically thin 2D semiconductors and van der Waals layered ferroelectrics can enable negative capacitance transistors with superior performance and bendability. Here, the authors report flexible negative capacitance transistors based on MoS2 and a ferroelectric dielectric CIPS with a minimum sub-threshold slope of 28 mV/dec and high gain logic invertors.
url	https://doi.org/10.1038/s41467-019-10738-4
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Van der Waals negative capacitance transistors

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