Q-Function-Based Traffic- and Thermal-Aware Adaptive Routing for 3D Network-on-Chip
Die-stacking technology is expanding the space diversity of on-chip communications by leveraging through-silicon-via (TSV) integration and wafer bonding. The 3D network-on-chip (NoC), a combination of die-stacking technology and systematic on-chip communication infrastructure, suffers from increased...
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doaj-271f7d83525045449d7cc96f8114e4b12020-11-25T02:56:04ZengMDPI AGElectronics2079-92922020-02-019339210.3390/electronics9030392electronics9030392Q-Function-Based Traffic- and Thermal-Aware Adaptive Routing for 3D Network-on-ChipSeung Chan Lee0Tae Hee Han1Department of Semiconductor and Display Engineering, College of Information and Communication Engineering, Sungkyunkwan University, Suwon, Gyeonggi-do 16410, KoreaDepartment of Artificial Intelligence, Sungkyunkwan University, Suwon, Gyeonggi-do 16410, KoreaDie-stacking technology is expanding the space diversity of on-chip communications by leveraging through-silicon-via (TSV) integration and wafer bonding. The 3D network-on-chip (NoC), a combination of die-stacking technology and systematic on-chip communication infrastructure, suffers from increased thermal density and unbalanced heat dissipation across multi-stacked layers, significantly affecting chip performance and reliability. Recent studies have focused on runtime thermal management (RTM) techniques for improving the heat distribution balance, but performance degradations, owing to RTM mechanisms and unbalanced inter-layer traffic distributions, remain unresolved. In this study, we present a Q-function-based traffic- and thermal-aware adaptive routing algorithm, utilizing a reinforcement machine learning technique that gradually incorporates updated information into an RTM-based 3D NoC routing path. The proposed algorithm initially collects deadlock-free directions, based on the RTM and topology information. Subsequently, Q-learning-based decision making (through the learning of regional traffic information) is deployed for performance improvement with more balanced inter-layer traffic. The simulation results show that the proposed routing algorithm can improve throughput by 14.0%−28.2%, with a 24.9% more balanced inter-layer traffic load and a 30.6% more distributed inter-layer thermal dissipation on average, compared with those obtained in previous studies of a 3D NoC with an 8 × 8 × 4 mesh topology.https://www.mdpi.com/2079-9292/9/3/392die-stacking3d network-on-chipheat dissipationruntime thermal managementq-functionreinforcement machine learningq-learning |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Seung Chan Lee Tae Hee Han |
spellingShingle |
Seung Chan Lee Tae Hee Han Q-Function-Based Traffic- and Thermal-Aware Adaptive Routing for 3D Network-on-Chip Electronics die-stacking 3d network-on-chip heat dissipation runtime thermal management q-function reinforcement machine learning q-learning |
author_facet |
Seung Chan Lee Tae Hee Han |
author_sort |
Seung Chan Lee |
title |
Q-Function-Based Traffic- and Thermal-Aware Adaptive Routing for 3D Network-on-Chip |
title_short |
Q-Function-Based Traffic- and Thermal-Aware Adaptive Routing for 3D Network-on-Chip |
title_full |
Q-Function-Based Traffic- and Thermal-Aware Adaptive Routing for 3D Network-on-Chip |
title_fullStr |
Q-Function-Based Traffic- and Thermal-Aware Adaptive Routing for 3D Network-on-Chip |
title_full_unstemmed |
Q-Function-Based Traffic- and Thermal-Aware Adaptive Routing for 3D Network-on-Chip |
title_sort |
q-function-based traffic- and thermal-aware adaptive routing for 3d network-on-chip |
publisher |
MDPI AG |
series |
Electronics |
issn |
2079-9292 |
publishDate |
2020-02-01 |
description |
Die-stacking technology is expanding the space diversity of on-chip communications by leveraging through-silicon-via (TSV) integration and wafer bonding. The 3D network-on-chip (NoC), a combination of die-stacking technology and systematic on-chip communication infrastructure, suffers from increased thermal density and unbalanced heat dissipation across multi-stacked layers, significantly affecting chip performance and reliability. Recent studies have focused on runtime thermal management (RTM) techniques for improving the heat distribution balance, but performance degradations, owing to RTM mechanisms and unbalanced inter-layer traffic distributions, remain unresolved. In this study, we present a Q-function-based traffic- and thermal-aware adaptive routing algorithm, utilizing a reinforcement machine learning technique that gradually incorporates updated information into an RTM-based 3D NoC routing path. The proposed algorithm initially collects deadlock-free directions, based on the RTM and topology information. Subsequently, Q-learning-based decision making (through the learning of regional traffic information) is deployed for performance improvement with more balanced inter-layer traffic. The simulation results show that the proposed routing algorithm can improve throughput by 14.0%−28.2%, with a 24.9% more balanced inter-layer traffic load and a 30.6% more distributed inter-layer thermal dissipation on average, compared with those obtained in previous studies of a 3D NoC with an 8 × 8 × 4 mesh topology. |
topic |
die-stacking 3d network-on-chip heat dissipation runtime thermal management q-function reinforcement machine learning q-learning |
url |
https://www.mdpi.com/2079-9292/9/3/392 |
work_keys_str_mv |
AT seungchanlee qfunctionbasedtrafficandthermalawareadaptiveroutingfor3dnetworkonchip AT taeheehan qfunctionbasedtrafficandthermalawareadaptiveroutingfor3dnetworkonchip |
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1724714415682486272 |